參數(shù)資料
型號(hào): 74VHCT32A
廠商: 意法半導(dǎo)體
英文描述: QUAD 2-INPUT OR GATE
中文描述: 四2輸入或門
文件頁(yè)數(shù): 1/7頁(yè)
文件大?。?/td> 52K
代理商: 74VHCT32A
74VHCT32A
QUAD 2-INPUT OR GATE
PRELIMINARY DATA
August 1999
I
HIGHSPEED:t
PD
=5ns(TYP.)atV
CC
=5V
I
LOWPOWERDISSIPATION:
I
CC
=2
μ
A(MAX.) at T
A
=25
o
C
I
COMPATIBLEWITH TTL OUTPUTS:
V
IH
=2V (MIN),V
IL
= 0.8V(MAX)
I
POWERDOWN PROTECTIONON INPUTS&
OUTPUTS
I
SYMMETRICALOUTPUTIMPEDANCE:
|I
OH
| = I
OL
= 8 mA(MIN)
I
BALANCEDPROPAGATIONDELAYS:
t
PLH
t
PHL
I
OPERATINGVOLTAGERANGE:
V
CC
(OPR)= 4.5Vto 5.5V
I
PINANDFUNCTION COMPATIBLEWITH
74SERIES32
I
IMPROVEDLATCH-UP IMMUNITY
I
LOWNOISE:V
OLP
= 0.8V(Max.)
DESCRIPTION
The 74VHCT32A is an advanced high-speed
CMOS QUAD 2-INPUT OR GATE fabricated with
sub-micron silicon gate and double-layer metal
wiring C
2
MOS technology.
The internal circuit is composed of 2 stages
including buffer output, which provide high noise
immunity and stable output.
Power down protection is provided on all inputs
and outputs and 0 to 7V can be accepted on
inputs with no regard to the supply voltage. This
device can be used to interface5V to 3V.
All
inputs
and
outputs are
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
equipped with
PIN CONNECTION AND IEC LOGIC SYMBOLS
ORDER CODES :
74VHCT32AM
74VHCT32AT
M
(Micro Package)
T
(TSSOPPackage)
1/7
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