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參數(shù)資料
| 型號(hào)： | 74VHCT373AT |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | OCTAL D-TYPE LATCH WITH 3 STATE OUTPUT NON INVERTING |
| 中文描述： | 八路D型，3態(tài)輸出的非反相鎖存 |
| 文件頁數(shù)： | 1/10頁 |
| 文件大?。?/td> | 73K |
| 代理商： | 74VHCT373AT |
74VHCT373A
OCTAL D-TYPE LATCH
WITH 3 STATE OUTPUT NON INVERTING
November 1999
I
HIGHSPEED:t
PD
=6.4ns(TYP.)atV
CC
= 5V
I
LOWPOWERDISSIPATION:
I
CC
=4
μ
A(MAX.) at T
A
=25
o
C
I
COMPATIBLEWITH TTL OUTPUTS:
V
IH
=2V (MIN),V
IL
= 0.8V(MAX)
I
POWERDOWN PROTECTIONON INPUTS&
OUTPUTS
I
SYMMETRICALOUTPUTIMPEDANCE:
|I
OH
| = I
OL
= 8 mA(MIN)
I
BALANCEDPROPAGATIONDELAYS:
t
PLH
t
PHL
I
OPERATINGVOLTAGERANGE:
V
CC
(OPR)= 4.5Vto 5.5V
I
PINANDFUNCTION COMPATIBLEWITH
74SERIES373
I
IMPROVEDLATCH-UP IMMUNITY
I
LOWNOISE:V
OLP
= 0.9V(Max.)
DESCRIPTION
The 74VHCT373A is an advanced high-speed
CMOS OCTAL D-TYPE LATCH with 3 STATE
OUTPUT
NON
INVERTING
sub-micron silicon gate and double-layer metal
wiring C
2
MOS technology.
This 8 bit D-Type latch is controlled by a latch
enable input (LE) and an output enable input
fabricated
with
(OE).
While the LE input is held at a high level, the Q
outputswill follow the datainputs precisely. When
the LE is taken low, the Q outputs will be latched
precisely at the logic level of D input data. While
the (OE) input is low, the 8 outputs will be in a
normal logic state (high or low logic level) and
while high level the outputs will be in a high
impedancestate.
Power down protection is provided on all inputs
and outputs and 0 to 7V can be accepted on
inputs with no regard to the supply voltage. This
device can be used to interface5V to 3V.
All
inputs
and
outputs are
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
equipped with
PIN CONNECTION AND IEC LOGIC SYMBOLS
ORDER CODES :
74VHCT373AM
74VHCT373AT
M
(Micro Package)
T
(TSSOPPackage)
1/10
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 74VHCT373A | Octal D-Type Latch with 3-STATE Outputs |
| 74VHCT373AM | Octal D-Type Latch with 3-STATE Outputs |
| 74VHCT373AMTC | Octal D-Type Latch with 3-STATE Outputs |
| 74VHCT373AN | Octal D-Type Latch with 3-STATE Outputs |
| 74VHCT373ASJ | Octal D-Type Latch with 3-STATE Outputs |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 74VHCT373ATTR | 功能描述:閉鎖 Octal "D" Latch RoHS:否 制造商:Micrel 電路數(shù)量:1 邏輯類型:CMOS 邏輯系列:TTL 極性:Non-Inverting 輸出線路數(shù)量:9 高電平輸出電流: 低電平輸出電流: 傳播延遲時(shí)間: 電源電壓-最大:12 V 電源電壓-最小:5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:SOIC-16 封裝:Reel |
| 74VHCT373M | 功能描述:IC DTYPE LATCH OCTAL 20SO 制造商:on semiconductor 系列:74VHCT 包裝:管件 零件狀態(tài):停產(chǎn) 邏輯類型:D 型透明鎖存器 電路:8：8 輸出類型:三態(tài) 電壓 - 電源:4.5 V ~ 5.5 V 獨(dú)立電路:1 延遲時(shí)間 - 傳播:5.1ns 電流 - 輸出高，低:8mA，8mA 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:20-SOIC（0.295"，7.50mm 寬） 供應(yīng)商器件封裝:20-SOIC 基本零件編號(hào):74VHCT373 標(biāo)準(zhǔn)包裝:36 |
| 74VHCT373SJ | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| 74VHCT374AM | 功能描述:觸發(fā)器 Oct D-Type Flip-Flop RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時(shí)間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
| 74VHCT374AM_Q | 功能描述:觸發(fā)器 Oct D-Type Flip-Flop RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時(shí)間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
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