參數(shù)資料
型號: 74VHCT27AMTR
廠商: 意法半導(dǎo)體
英文描述: TRIPLE 3-INPUT NOR GATE
中文描述: 三重3輸入或非門
文件頁數(shù): 1/7頁
文件大?。?/td> 50K
代理商: 74VHCT27AMTR
74VHCT27A
TRIPLE 3-INPUT NOR GATE
PRELIMINARY DATA
February 2000
PIN CONNECTION AND IEC LOGIC SYMBOLS
I
HIGHSPEED:t
PD
=5ns(TYP.)atV
CC
=5V
I
LOWPOWERDISSIPATION:
I
CC
=2
μ
A(MAX.) at T
A
=25
o
C
I
COMPATIBLEWITH TTL OUTPUTS:
V
IH
=2V (MIN),V
IL
= 0.8V(MAX)
I
POWERDOWN PROTECTIONON INPUTS&
OUTPUTS
I
SYMMETRICALOUTPUTIMPEDANCE:
|I
OH
| = I
OL
= 8 mA(MIN)
I
BALANCEDPROPAGATIONDELAYS:
t
PLH
t
PHL
I
OPERATINGVOLTAGERANGE:
V
CC
(OPR)= 4.5Vto 5.5V
I
PINANDFUNCTION COMPATIBLEWITH
74SERIES27
I
IMPROVEDLATCH-UP IMMUNITY
DESCRIPTION
The 74VHCT27A is an advanced high-speed
CMOS TRIPLE 3-INPUT NOR GATE fabricated
with sub-micron silicon gate and double-layer
metalwiring C
2
MOStechnology.
The internal circuit is composed of 3 stages
including buffer output, which provides high noise
immunity and stable output.
Power down protection is provided on all inputs
and outputs and 0 to 7V can be accepted on
inputs with no regard to the supply voltage. This
device can be used to interface5V to 3V.
All
inputs
and
outputs are
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
equipped with
SOP
TSSOP
ORDER CODES
TUBE
74VHCT27AM
PACKAGE
SOP
TSSOP
T & R
74VHCT27AMTR
74VHCT27ATTR
1/7
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