參數(shù)資料
型號(hào): 74VHC595N
廠商: FAIRCHILD SEMICONDUCTOR CORP
元件分類: 通用總線功能
英文描述: Hex Schmitt-Trigger Inverters 14-TSSOP -40 to 85
中文描述: AHC/VHC SERIES, 8-BIT RIGHT SERIAL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, PDIP16
封裝: 0.300 INCH, PLASTIC, MS-001, DIP-16
文件頁數(shù): 1/9頁
文件大?。?/td> 83K
代理商: 74VHC595N
August 1993
Revised April 1999
7
1999 Fairchild Semiconductor Corporation
DS011640.prf
www.fairchildsemi.com
74VHC595
8-Bit Shift Register with Output Latches
General Description
The VHC595 is an advanced high-speed CMOS Shift Reg-
ister fabricated with silicon gate CMOS technology. It
achieves the high-speed operation similar to equivalent
Bipolar Schottky TTL while maintaining the CMOS low
power dissipation.
This device contains an 8-bit serial-in, parallel-out shift reg-
ister that feeds an 8-bit D-type storage register. The stor-
age register has eight 3-STATE outputs. Separate clocks
are provided for both the shift register and the storage reg-
ister. The shift register has a direct-overriding clear, serial
input, and serial output (standard) pins for cascading. Both
the shift register and storage register use positive-edge
triggered clocks. If both clocks are connected together, the
shift register state will always be one clock pulse ahead of
the storage register.
An input protection circuit insures that 0V to 7V can be
applied to the input pins without regard to the supply volt-
age. This device can be used to interface 5V to 3V systems
and two supply systems such as battery backup. This cir-
cuit prevents device destruction due to mismatched supply
and input voltages.
Features
I
High Speed: t
PD
=
5.4 ns (typ) at V
CC
=
5V
I
Low power dissipation: I
CC
=
4
μ
A (max) at T
A
=
25
°
C
I
High noise immunity: V
NIH
=
V
NIL
=
28% V
CC
(min)
I
Power down protection is provided on all inputs
I
Low noise: V
OLP
=
0.9V (typ)
I
Pin and function compatible with 74HC595
Ordering Code:
Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
IEEE/IEC
Connection Diagram
Order Number
74VHC595M
74VHC595SJ
74VHC595MTC
74VHC595N
Package Number
M16A
M16D
MTC16
N16E
Package Description
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
相關(guān)PDF資料
PDF描述
74VHC595SJ Hex Schmitt-Trigger Inverters 14-TSSOP -40 to 85
74VHC595SJX Triple Differential Driver With Sync-On-Common-Mode; Package: LFCSP (4x4mm w/2.10mm EP); No of Pins: 24; Temperature Range: Industrial
74VHC595NX 8-Bit Shift Register with Output Latches
74VHCT00AM Quad 2-Input NAND Gate
74VHCT00A Quad 2-Input NAND Gate
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