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參數(shù)資料
| 型號： | 74VHC4040MTCX |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類： | 通用總線功能 |
| 英文描述： | Code Hopping Encoder 3.5- 13V, -40C to +85C, 8-SOIC 150mil, TUBE |
| 中文描述： | AHC/VHC/H/U/V SERIES, ASYN NEGATIVE EDGE TRIGGERED 12-BIT UP BINARY COUNTER, PDSO16 |
| 封裝： | 4.40 MM, MO-153, TSSOP-16 |
| 文件頁數(shù)： | 4/7頁 |
| 文件大?。?/td> | 67K |
| 代理商： | 74VHC4040MTCX |
www.fairchildsemi.com
4
7
AC Electrical Characteristics
Note 3:
C
PD
is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average
operating current can be obtained by the equation: I
CC
(opr)
=
C
PD
* V
CC
* f
N
+
I
CC
.
AC Operating Requirements
Symbol
Parameter
V
CC
(V)
T
A
=
+
25
°
C
Typ
7.5
10.0
4.8
T
A
=
40
°
C to
+
85
°
C
Min
1.0
1.0
1.0
Units
Conditions
Min
Max
11.9
15.4
7.3
Max
14.0
17.5
8.5
t
PLH
t
PHL
Propagation Delay Time
to Q
1
3.3
±
0.3
ns
C
L
=
15 pF
C
L
=
50 pF
C
L
=
15 pF
C
L
=
50 pF
C
L
=
15 pF
C
L
=
50 pF
C
L
=
15 pF
C
L
=
50 pF
C
L
=
15 pF
C
L
=
50 pF
C
L
=
15 pF
C
L
=
50 pF
C
L
=
15 pF
C
L
=
50 pF
C
L
=
15 pF
C
L
=
50 pF
V
CC
=
Open
(Note 3)
5.0
±
0.5
ns
6.3
9.3
1.0
10.5
t
PLH
t
PHL
Propagation Delay Time
between Stages from
3.3
±
0.3
ns
2.4
4.4
1.0
5.0
Q
n
to Q
n
+
1
5.0
±
0.5
ns
1.6
8.3
3.1
12.8
1.0
1.0
3.5
15.0
t
PHL
Propagation Delay Time
3.3
±
0.3
ns
MR–Q
n
10.8
5.6
7.1
16.3
8.6
10.6
1.0
1.0
1.0
18.5
10.0
12.0
5.0
±
0.5
ns
f
MAX
Maximum Clock
Frequency
3.3
±
0.3
90
55
150
140
80
210
75
50
125
MHz
5.0
±
0.5
MHz
95
125
4
21
80
C
IN
C
PD
Input Capacitance
Power Dissipation Capacitance
10
10
pF
pF
Symbol
Parameter
V
CC
(V)
T
A
=
25
°
C
T
A
=
40
°
C to
+
85
°
C
Guaranteed Minimum
5.0
5.0
Units
Typ
t
w
(L)
t
w
(H)
t
w
(L)
Minimum Pulse Width
3.3
±
0.3
5.0
±
0.5
5.0
5.0
ns
(CP)
Minimum Pulse Width
(MR)
Minimum Removal Time
3.3
±
0.3
5.0
±
0.5
3.3
±
0.3
5.0
±
0.5
5.0
5.0
5.0
5.0
5.0
5.0
ns
t
REC
ns
(MR)
5.0
5.0
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