參數(shù)資料
型號: 74VHC374SJX
廠商: FAIRCHILD SEMICONDUCTOR CORP
元件分類: 通用總線功能
英文描述: Octal D-Type Flip-Flop
中文描述: AHC/VHC SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20
封裝: 5.30 MM, LEAD FREE, EIAJ TYPE2, SOP-20
文件頁數(shù): 1/10頁
文件大小: 75K
代理商: 74VHC374SJX
74VHC374
OCTAL D-TYPE FLIP FLOP
WITH 3 STATE OUTPUT NON INVERTING
June 1999
I
HIGHSPEED:
I
f
MAX
= 270MHz(TYP.)atV
CC
= 5V
I
LOWPOWERDISSIPATION:
I
CC
=4
μ
A(MAX.) at T
A
=25
o
C
I
HIGHNOISEIMMUNITY:
V
NIH
= V
NIL
=28%V
CC
(MIN.)
I
POWERDOWN PROTECTIONON INPUTS
I
SYMMETRICALOUTPUTIMPEDANCE:
|I
OH
| = I
OL
= 8 mA(MIN)
I
BALANCEDPROPAGATIONDELAYS:
t
PLH
t
PHL
I
OPERATINGVOLTAGERANGE:
V
CC
(OPR)= 2Vto 5.5V
I
PINANDFUNCTION COMPATIBLEWITH
74SERIES374
I
IMPROVEDLATCH-UP IMMUNITY
I
LOWNOISEV
OLP
= 0.9V(Max.)
DESCRIPTION
The 74VHC374 is an advanced high-speed
CMOS OCTAL D-TYPE FLIP FLOP with 3
STATE OUTPUT NON INVERTING fabricated
with sub-micron silicon gate and double-layer
metalwiring C
2
MOStechnology.
This 8 bit D-Type flip-flop is controlled by a clock
input (CK) and an output enable input (OE).
On the positive transition of the clock, the Q
outputs will be set to the logic state that were
setupat the D inputs.
While the (OE) input is low, the 8 outputs will be
in a normal logic state (high or low logic level)
and while high level the outputs will be in a high
impedancestate.
The output control does not affect the internal
operationof flip flops; that is, the old data can be
retained or the new data can be entered even
whilethe outputsare off.
Power down protection is provided on all inputs
and 0 to 7V can be accepted on inputs with no
regard to the supply voltage. This device can be
used to interface5V to 3V.
All
inputs
and
outputs are
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
equipped with
PIN CONNECTION AND IEC LOGIC SYMBOLS
ORDER CODES :
74VHC374M
74VHC374T
M
(Micro Package)
T
(TSSOPPackage)
1/10
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