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參數(shù)資料
| 型號(hào)： | 74VCX16240 |
| 廠商： | Fairchild Semiconductor Corporation |
| 英文描述： | Low Voltage 16-Bit Inverting Buffer/Line Driver with 3.6V Tolerant Inputs and Outputs |
| 中文描述： | 低電壓16位反向緩沖器/線，在3.6V耐壓輸入和輸出驅(qū)動(dòng)器 |
| 文件頁數(shù)： | 1/7頁 |
| 文件大小： | 52K |
| 代理商： | 74VCX16240 |
January 1998
Revised April 1999
7
1999 Fairchild Semiconductor Corporation
DS500099.prf
www.fairchildsemi.com
74VCX16240
Low Voltage 16-Bit Inverting Buffer/Line Driver with
3.6V Tolerant Inputs and Outputs
General Description
The VCX16240 contains sixteen inverting buffers with 3-
STATE outputs to be employed as a memory and address
driver, clock driver, or bus oriented transmitter/receiver.
The device is nibble (4-bit) controlled. Each nibble has sep-
arate 3-STATE control inputs which can be shorted
together for full 16-bit operation.
The 74VCX16240 is designed for low voltage (1.65V to
3.6V) V
CC
applications with I/O capability up to 3.6V.
The 74VCX16240 is fabricated with an advanced CMOS
technology to achieve high speed operation while maintain-
ing low CMOS power dissipation.
Features
I
1.65V–3.6V V
CC
supply operation
I
3.6V tolerant inputs and outputs
I
t
PD
2.5 ns max for 3.0V to 3.6V V
CC
3.0 ns max for 2.3V to 2.7V V
CC
6.0 ns max for 1.65V to 1.95V V
CC
I
Power-off high impedance inputs and outputs
I
Supports live insertion and withdrawal (Note 1)
I
Static Drive (I
OH
/I
OL
)
±
24 mA @ 3.0V V
CC
±
18 mA @ 2.3V V
CC
±
6 mA @ 1.65V V
CC
I
Uses patented noise/EMI reduction circuitry
I
Latch-up performance exceeds 300 mA
I
ESD performance:
Human body model
>
2000V
Machine model
>
200V
Note 1:
To ensure the high-impedance state during power up or power
down, OE should be tied to V
CC
through a pull-up resistor; the minimum
value of the resistor is determined by the current-sourcing capability of the
driver.
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
Pin Descriptions
Order Number
74VCX16240MTD
Package Number
MTD48
Package Descriptions
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Pin Names
Description
OE
n
I
0
–I
15
O
0
–O
15
Output Enable Input (Active LOW)
Inputs
Outputs
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 74VCX16240MTD | Low Voltage 16-Bit Inverting Buffer/Line Driver with 3.6V Tolerant Inputs and Outputs |
| 74VCX16240MTDX | Quad 4-Bit Buffer/Driver |
| 74VCX16244G | Low Voltage 16-Bit Buffer/Line Driver with 3.6V Tolerant Inputs and Outputs |
| 74VCX16245G | Low Voltage 16-Bit Bidirectional Transceiver with 3.6V Tolerant Inputs and Outputs |
| 74VCX16245 | Low Voltage 16-Bit Bidirectional Transceiver with 3.6V Tolerant Inputs and Outputs |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 74VCX16240/D | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Low-Voltage 1.8/2.5/3.3V 16-Bit Buffer |
| 74VCX16240_05 | 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:Low Voltage 16-Bit Inverting Buffer/Line Driver with 3.6V Tolerant Inputs and Outputs |
| 74VCX16240_YBA31162 WAF | 制造商:Fairchild Semiconductor Corporation 功能描述: |
| 74VCX16240DT | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| 74VCX16240DTR | 制造商:ON Semiconductor 功能描述:Buffer/Line Driver 16-CH Inverting 3-ST CMOS 48-Pin TSSOP T/R |
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