參數(shù)資料
型號: 74VCX16240MTD
廠商: FAIRCHILD SEMICONDUCTOR CORP
元件分類: 通用總線功能
英文描述: Low Voltage 16-Bit Inverting Buffer/Line Driver with 3.6V Tolerant Inputs and Outputs
中文描述: ALVC/VCX/A SERIES, QUAD 4-BIT DRIVER, INVERTED OUTPUT, PDSO48
封裝: 6.10 MM, MO-153AB, TSSOP-48
文件頁數(shù): 1/7頁
文件大?。?/td> 52K
代理商: 74VCX16240MTD
January 1998
Revised April 1999
7
1999 Fairchild Semiconductor Corporation
DS500099.prf
www.fairchildsemi.com
74VCX16240
Low Voltage 16-Bit Inverting Buffer/Line Driver with
3.6V Tolerant Inputs and Outputs
General Description
The VCX16240 contains sixteen inverting buffers with 3-
STATE outputs to be employed as a memory and address
driver, clock driver, or bus oriented transmitter/receiver.
The device is nibble (4-bit) controlled. Each nibble has sep-
arate 3-STATE control inputs which can be shorted
together for full 16-bit operation.
The 74VCX16240 is designed for low voltage (1.65V to
3.6V) V
CC
applications with I/O capability up to 3.6V.
The 74VCX16240 is fabricated with an advanced CMOS
technology to achieve high speed operation while maintain-
ing low CMOS power dissipation.
Features
I
1.65V–3.6V V
CC
supply operation
I
3.6V tolerant inputs and outputs
I
t
PD
2.5 ns max for 3.0V to 3.6V V
CC
3.0 ns max for 2.3V to 2.7V V
CC
6.0 ns max for 1.65V to 1.95V V
CC
I
Power-off high impedance inputs and outputs
I
Supports live insertion and withdrawal (Note 1)
I
Static Drive (I
OH
/I
OL
)
±
24 mA @ 3.0V V
CC
±
18 mA @ 2.3V V
CC
±
6 mA @ 1.65V V
CC
I
Uses patented noise/EMI reduction circuitry
I
Latch-up performance exceeds 300 mA
I
ESD performance:
Human body model
>
2000V
Machine model
>
200V
Note 1:
To ensure the high-impedance state during power up or power
down, OE should be tied to V
CC
through a pull-up resistor; the minimum
value of the resistor is determined by the current-sourcing capability of the
driver.
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
Pin Descriptions
Order Number
74VCX16240MTD
Package Number
MTD48
Package Descriptions
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Pin Names
Description
OE
n
I
0
–I
15
O
0
–O
15
Output Enable Input (Active LOW)
Inputs
Outputs
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74VCX16244 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:LOW VOLTAGE CMOS 16-BIT BUS BUFFER (3-STATE) WITH 3.6V TOLERANT INPUTS AND OUTPUTS