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參數(shù)資料
| 型號(hào)： | 74LVTH322373 |
| 廠(chǎng)商： | Fairchild Semiconductor Corporation |
| 英文描述： | Low Voltage 32-Bit Transparent Latch with 3-STATE Outputs and 25з Series Resistors in the Outputs |
| 中文描述： | 低電壓32位透明鎖存器與三態(tài)輸出和25з在輸出串聯(lián)電阻 |
| 文件頁(yè)數(shù)： | 1/6頁(yè) |
| 文件大小： | 161K |
| 代理商： | 74LVTH322373 |
2002 Fairchild Semiconductor Corporation
DS500742
www.fairchildsemi.com
May 2002
Revised May 2002
7
R
74LVT322373
74LVTH322373
Low Voltage 32-Bit Transparent Latch
with 3-STATE Outputs
and 25
Series Resistors in the Outputs
General Description
The LVT322373 and LVTH322373 contain thirty-two non-
inverting latches with 3-STATE outputs and are intended
for bus oriented applications. The device is byte controlled.
The flip-flops appear transparent to the data when the
Latch Enable (LE) is HIGH. When LE is LOW, the data that
meets the setup time is latched. Data appears on the bus
when the Output Enable (OE) is LOW. When OE is HIGH,
the outputs are in a high impedance state.
The LVTH322373 data inputs include bushold, eliminating
the need for external pull-up resistors to hold unused
inputs.
These latches are designed for low voltage (3.3V) V
CC
applications, but with the capability to provide a TTL inter-
face to a 5V environment. The LVT322373 and
LVTH322373 are fabricated with an advanced BiCMOS
technology to achieve high speed operation similar to 5V
ABT while maintaining a low power dissipation.
Features
I
Input and output interface capability to systems at
5V V
CC
I
Bushold data inputs eliminate the need for external
pull-up resistors to hold unused inputs (74LVTH322373),
also available without bushold feature (74LVT322373)
I
Live insertion/extraction permitted
I
Power Up/Down high impedance provides glitch-free
bus loading
I
Outputs include equivalent series resistance of 25
to
make external termination resistors unnecessary and
reduce overshoot and undershoot
I
ESD performance:
Human-body model
>
2000V
Machine model
>
200V
Charged-device model
>
1000V
I
Packaged in plastic Fine-Pitch Ball Grid Array (FBGA)
Ordering Code:
Note 1:
Ordering Code “G” indicates Trays.
Note 2:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
Order Number
74LVT322373G
(Note 1) (Note 2)
74LVTH322373G
(Note 1) (Note 2)
Package Number
BGA96A
(Preliminary)
BGA96A
Package Description
96-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide
96-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 74LVTH322373G | 功能描述:閉鎖 Transparent Latch LV 32Bit RoHS:否 制造商:Micrel 電路數(shù)量:1 邏輯類(lèi)型:CMOS 邏輯系列:TTL 極性:Non-Inverting 輸出線(xiàn)路數(shù)量:9 高電平輸出電流: 低電平輸出電流: 傳播延遲時(shí)間: 電源電壓-最大:12 V 電源電壓-最小:5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:SOIC-16 封裝:Reel |
| 74LVTH322373GX | 功能描述:閉鎖 Transparent Latch LV 32Bit RoHS:否 制造商:Micrel 電路數(shù)量:1 邏輯類(lèi)型:CMOS 邏輯系列:TTL 極性:Non-Inverting 輸出線(xiàn)路數(shù)量:9 高電平輸出電流: 低電平輸出電流: 傳播延遲時(shí)間: 電源電壓-最大:12 V 電源電壓-最小:5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:SOIC-16 封裝:Reel |
| 74LVTH322374ZKER | 功能描述:觸發(fā)器 ABT 32-Bit Edge-Trig D-Type F-F RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類(lèi)型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類(lèi)型:CMOS 輸出類(lèi)型: 傳播延遲時(shí)間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
| 74LVTH32245EC | 功能描述:總線(xiàn)收發(fā)器 3.3V 32-BIT XCEIVER DIR PIN RoHS:否 制造商:Fairchild Semiconductor 邏輯類(lèi)型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類(lèi)型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| 74LVTH32245EC,518 | 功能描述:總線(xiàn)收發(fā)器 3.3V 32-BIT XCEIVER RoHS:否 制造商:Fairchild Semiconductor 邏輯類(lèi)型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類(lèi)型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
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