參數(shù)資料
型號： 74LVT573
廠商： Fairchild Semiconductor Corporation
英文描述： Low Voltage Octal Transparent Latch with 3-STATE Outputs
中文描述： 低壓八路透明鎖存器與三態(tài)輸出
文件頁數(shù)： 5/12頁
文件大小： 99K
代理商： 74LVT573
Philips Semiconductors
Product specification
74LVT573
3.3V Octal D-type transparent latch
(3-State)
1998 Feb 19
5
DC ELECTRICAL CHARACTERISTICS
LIMITS
SYMBOL
PARAMETER
TEST CONDITIONS
Temp = -40
°
C to +85
°
C
UNIT
MIN
TYP
1
MAX
V
IK
Input clamp voltage
V
CC
= 2.7V; I
IK
= –18mA
–0.9
–1.2
V
V
CC
= 2.7 to 3.6V; I
OH
= –100
μ
A
V
CC
-0.2
V
CC
-0.1
V
OH
High-level output voltage
V
CC
= 2.7V; I
OH
= –8mA
2.4
2.5
V
V
CC
= 3.0V; I
OH
= –32mA
2.0
2.2
V
CC
= 2.7V; I
OL
= 100
μ
A
0.1
0.2
V
CC
= 2.7V; I
OL
= 24mA
0.3
0.5
V
OL
Low-level output voltage
V
CC
= 3.0V; I
OL
= 16mA
0.25
0.4
V
V
CC
= 3.0V; I
OL
= 32mA
0.3
0.5
V
CC
= 3.0V; I
OL
= 64mA
0.4
0.55
V
RST
Power-up output low voltage
5
V
CC
= 3.6V; I
O
= 1mA; V
I
= GND or V
CC
0.13
0.55
V
V
CC
= 0 or 3.6V; V
I
= 5.5V
V
CC
= 3.6V; V
I
= V
CC
or GND
V
CC
= 3.6V; V
I
= V
CC
1
10
I
I
Input leakage current
Control pins
±
0.1
±
1
Data pins
4
0.1
1
μ
A
V
CC
= 3.6V; V
I
= 0
–1
-5
I
OFF
Output off current
V
CC
= 0V; V
I
or V
O
= 0 to 4.5V
V
CC
= 3V; V
I
= 0.8V
V
CC
= 3V; V
I
= 2.0V
V
CC
= 0V to 3.6V; V
CC
= 3.6V
1
±
100
μ
A
75
–75
±
500
150
–150
I
HOLD
Bus Hold current A inputs
7
μ
A
I
EX
Current into an output in the
High state when V
O
> V
CC
V
O
= 5.5V; V
CC
= 3.0V
60
125
μ
A
I
PU/PD
Power up/down 3-State output
current
3
V
≤
1.2V; V
= 0.5V to V
CC
; V
I
= GND or V
CC
;
OE/OE = Don’t care
1
±
100
μ
A
I
OZH
3-State output High current
V
CC
= 3.6V; V
O
= 3V; V
I
= V
IL
or V
IH
1
5
μ
A
I
OZL
3-State output Low current
V
CC
= 3.6V; V
O
= 0.5V; V
I
= V
IL
or V
IH
–1
–5
I
CCH
V
CC
= 3.6V; Outputs High, V
I
= GND or V
CC,
I
O =
0
0.13
0.19
I
CCL
Quiescent supply current
V
CC
= 3.6V; Outputs Low, V
I
= GND or V
CC,
I
O =
0
3
12
mA
I
CCZ
V
CC
= 3.6V; Outputs Disabled; V
I
= GND or V
CC,
I
O =
0
5
0.13
0.19
I
CC
Additional supply current per
input pin
2
V
CC
= 3V to 3.6V; One input at V
CC
-0.6V,
Other inputs at V
CC
or GND
0.1
0.2
mA
NOTES:
1. All typical values are at V
CC
= 3.3V and T
amb
= 25
°
C.
2. This is the increase in supply current for each input at the specified voltage level other than V
or GND
3. This parameter is valid for any V
between 0V and 1.2V with a transition time of up to 10msec. From V
CC
= 1.2V to V
CC
= 3.3V
±
0.3V a
transition time of 100
μ
sec is permitted. This parameter is valid for T
amb
= 25
°
C only
4. Unused pins at V
CC
or GND.
5. For valid test results, data must not be loaded into the flip-flops (or latches) after applying the power.
6. I
CCZ
is measured with outputs pulled to V
CC
or GND.
7. This is the bus hold overdrive current required to force the input to the opposite logic state.
相關(guān)PDF資料
PDF描述
74LVT573MSA Octal Edge-Triggered D-Type Flip-Flops With 3-State Outputs 20-SO -40 to 85
74LVT573MSAX Octal Edge-Triggered D-Type Flip-Flops With 3-State Outputs 20-TSSOP -40 to 85
74LVT573MTC Octal Edge-Triggered D-Type Flip-Flops With 3-State Outputs 20-TSSOP -40 to 85
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
74LVT573BQ 制造商:NXP Semiconductors 功能描述:IC OCT D TYPE LATCH 3-ST DH
74LVT573BQ,115 功能描述:閉鎖 3.3V OCTAL D TRANS RoHS:否 制造商:Micrel 電路數(shù)量:1 邏輯類型:CMOS 邏輯系列:TTL 極性:Non-Inverting 輸出線路數(shù)量:9 高電平輸出電流: 低電平輸出電流: 傳播延遲時間: 電源電壓-最大:12 V 電源電壓-最小:5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:SOIC-16 封裝:Reel
74LVT573BQ-G 功能描述:閉鎖 3.3V OCTAL D TRANS LATCH 3-S RoHS:否 制造商:Micrel 電路數(shù)量:1 邏輯類型:CMOS 邏輯系列:TTL 極性:Non-Inverting 輸出線路數(shù)量:9 高電平輸出電流: 低電平輸出電流: 傳播延遲時間: 電源電壓-最大:12 V 電源電壓-最小:5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:SOIC-16 封裝:Reel
74LVT573D 功能描述:閉鎖 3.3V OCTAL D TRANS LATCH 3-S RoHS:否 制造商:Micrel 電路數(shù)量:1 邏輯類型:CMOS 邏輯系列:TTL 極性:Non-Inverting 輸出線路數(shù)量:9 高電平輸出電流: 低電平輸出電流: 傳播延遲時間: 電源電壓-最大:12 V 電源電壓-最小:5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:SOIC-16 封裝:Reel
74LVT573D,112 功能描述:閉鎖 3.3V OCTAL D TRANS RoHS:否 制造商:Micrel 電路數(shù)量:1 邏輯類型:CMOS 邏輯系列:TTL 極性:Non-Inverting 輸出線路數(shù)量:9 高電平輸出電流: 低電平輸出電流: 傳播延遲時間: 電源電壓-最大:12 V 電源電壓-最小:5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:SOIC-16 封裝:Reel
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