參數(shù)資料
型號: 74LVC16244ADGG,112
廠商: NXP Semiconductors
文件頁數(shù): 15/19頁
文件大?。?/td> 0K
描述: IC BUFF DVR TRI-ST 16BIT 48TSSOP
產(chǎn)品培訓(xùn)模塊: Logic Packages
標準包裝: 39
系列: 74LVC
邏輯類型: 緩沖器/線路驅(qū)動器,非反相
元件數(shù): 4
每個元件的位元數(shù): 4
輸出電流高,低: 24mA,24mA
電源電壓: 1.2 V ~ 3.6 V
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 48-TFSOP(0.240",6.10mm 寬)
供應(yīng)商設(shè)備封裝: 48-TSSOP
包裝: 管件
其它名稱: 568-8316-5
74LVC16244ADG
74LVC16244ADG-ND
74LVC16244ADGG,112-ND
74LVC16244ADGG,512
74LVC16244ADGG,512-ND
935235150112
74LVC_LVCH16244A
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2014. All rights reserved.
Product data sheet
Rev. 13 — 7 February 2014
5 of 19
NXP Semiconductors
74LVC16244A; 74LVCH16244A
16-bit buffer/line driver; 5 V input/output tolerant; 3-state
5.2 Pin description
6.
Functional description
[1]
H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state.
Table 2.
Pin description
Symbol
Pin
Description
SOT370-1 and
SOT362-1
SOT702-1
SOT1134-2
1OE, 2OE,
3OE, 4OE
1, 48, 25, 24
A1, A6, K6, K1
A30, A29, A14, A13
output enable input (active LOW)
1Y0 to 1Y3
2, 3, 5, 6
B2, B1, C2, C1
B20, A31, D5, D1
data output
2Y0 to 2Y3
8, 9, 11, 12
D2, D1, E2, E1
A2, B2, B3, A5
data output
3Y0 to 3Y3
13, 14, 16, 17
F1, F2, G1, G2
A6, B5, B6, A9
data output
4Y0 to 4Y3
19, 20, 22, 23
H1, H2, J1, J2
D2, D6, A12, B8
data output
GND
4, 10, 15, 21, 28,
34, 39, 45
B3, B4, D3, D4, G3, G4,
J3, J4
A32, A3, A8, A11, A16,
A19, A24, A27
ground (0 V)
VCC
7, 18, 31, 42
C3, C4, H3, H4
A1, A10, A17, A26
supply voltage
1A0 to 1A3
47, 46, 44, 43
B5, B6, C5, C6
B18, A28, D8, D4
data input
2A0 to 2A3
41, 40, 38, 37
D5, D6, E5, E6
A25, B16, B15, A22
data input
3A0 to 3A3
36, 35, 33, 32
F6, F5, G6, G5
A21, B13, B12, A18
data input
4A0 to 4A3
30, 29, 27, 26
H6, H5, J6, J5
D3, D7, A15, B10
data input
n.c.
-
A2, A3, A4, A5, K2, K3,
K4, K5
A4, A7, A20, A23, B1,
B4, B7, B9, B11, B14,
B17, B19
not connected
Table 3.
Function table[1]
Control
Input
Output
nOE
nAn
nYn
LLL
LH
H
HX
Z
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