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參數(shù)資料
| 型號： | 74HCT40105 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | 8-Bit Parallel-Load Shift Registers 16-SOIC -40 to 85 |
| 中文描述： | 4位× 16字FIFO寄存器 |
| 文件頁數(shù)： | 13/25頁 |
| 文件大?。?/td> | 200K |
| 代理商： | 74HCT40105 |
1998 Jan 23
13
Philips Semiconductors
Product specification
4-bit x 16-word FIFO register
74HC/HCT40105
With FIFO empty; SO is held HIGH in anticipation
Fig.10 Waveforms showing ripple through delay SI input to DOR output
and propagation delay from the DOR pulse to the Q
n
output.
(1) HC : V
M
= 50%; V
I
= GND to V
.
HCT : V
M
= 1.3 V; V
I
= GND to 3 V.
agewidth
MBA337
tPHL/ tPLH
VM
(1)
SI INPUT
SO INPUT
DOR OUTPUT
Qn
VM
(1)
VM
(1)
2
1
tPLH
ripple through
delay
4
5
6
tPHL
3
Notes to
Fig.10
1.
FIFO is initially empty, SO is held
HIGH.
SI pulse; loads data into FIFO
and initiates ripple through
process.
DOR flag signals the arrival of
valid data at the output stage.
Output transition; data arrives at
output stage after the specified
propagation delay between the
rising edge of the DOR pulse to
the Q
n
output.
SO set LOW; necessary to
complete shift-out process. DOR
remains LOW, because FIFO is
empty.
DOR goes LOW; FIFO is empty
again.
2.
3.
4.
5.
6.
Shift-in operation; high-speed burst mode
Fig.11 Waveforms showing SI minimum pulse width and SI maximum
pulse frequency, in high-speed shift-in burst mode.
(1) HC : V
M
= 50%; V
I
= GND to V
.
HCT : V
M
= 1.3 V; V
I
= GND to 3 V.
Note to
Fig.11
In the high-speed mode, the burst-in
rate is determined by the minimum
shift-in HIGH and shift-in LOW
specifications. The DIR status flag is
a don’t care condition, and a shift-in
pulse can be applied regardless of the
flag. A SI pulse which would overflow
the storage capacity of the FIFO is
ignored.
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| 74HCT4015 | 8-Bit Parallel-Load Shift Registers 16-SO -40 to 85 |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 74HCT40105D | 功能描述:寄存器 4-BIT X 16 WORD FIFO REGISTER RoHS:否 制造商:NXP Semiconductors 邏輯類型:CMOS 邏輯系列:HC 電路數(shù)量:1 最大時鐘頻率:36 MHz 傳播延遲時間: 高電平輸出電流:- 7.8 mA 低電平輸出電流:7.8 mA 電源電壓-最大:6 V 最大工作溫度:+ 125 C 封裝 / 箱體:SOT-38 封裝:Tube |
| 74HCT40105D,112 | 功能描述:寄存器 4-BIT X 16 WORD FIFO RoHS:否 制造商:NXP Semiconductors 邏輯類型:CMOS 邏輯系列:HC 電路數(shù)量:1 最大時鐘頻率:36 MHz 傳播延遲時間: 高電平輸出電流:- 7.8 mA 低電平輸出電流:7.8 mA 電源電壓-最大:6 V 最大工作溫度:+ 125 C 封裝 / 箱體:SOT-38 封裝:Tube |
| 74HCT40105D,118 | 功能描述:寄存器 4-BIT X 16 WORD FIFO RoHS:否 制造商:NXP Semiconductors 邏輯類型:CMOS 邏輯系列:HC 電路數(shù)量:1 最大時鐘頻率:36 MHz 傳播延遲時間: 高電平輸出電流:- 7.8 mA 低電平輸出電流:7.8 mA 電源電壓-最大:6 V 最大工作溫度:+ 125 C 封裝 / 箱體:SOT-38 封裝:Tube |
| 74HCT40105DB | 功能描述:寄存器 4-BIT X 16 WORD FIFO REGISTER RoHS:否 制造商:NXP Semiconductors 邏輯類型:CMOS 邏輯系列:HC 電路數(shù)量:1 最大時鐘頻率:36 MHz 傳播延遲時間: 高電平輸出電流:- 7.8 mA 低電平輸出電流:7.8 mA 電源電壓-最大:6 V 最大工作溫度:+ 125 C 封裝 / 箱體:SOT-38 封裝:Tube |
| 74HCT40105DB,112 | 功能描述:寄存器 4-BIT X 16 WORD FIFO RoHS:否 制造商:NXP Semiconductors 邏輯類型:CMOS 邏輯系列:HC 電路數(shù)量:1 最大時鐘頻率:36 MHz 傳播延遲時間: 高電平輸出電流:- 7.8 mA 低電平輸出電流:7.8 mA 電源電壓-最大:6 V 最大工作溫度:+ 125 C 封裝 / 箱體:SOT-38 封裝:Tube |
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