參數(shù)資料
型號: 74HC652PW,112
廠商: NXP Semiconductors
文件頁數(shù): 8/10頁
文件大?。?/td> 0K
描述: IC TRANSCVR 3ST 8BIT INV 24TSSOP
產(chǎn)品培訓(xùn)模塊: Logic Packages
標(biāo)準(zhǔn)包裝: 63
系列: 74HC
邏輯類型: 收發(fā)器,反相
元件數(shù): 1
每個元件的位元數(shù): 8
輸出電流高,低: 7.8mA,7.8mA
電源電壓: 2 V ~ 6 V
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 24-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 24-TSSOP
包裝: 管件
其它名稱: 74HC652PW
74HC652PW-ND
935248860112
www.rohm.com
2012.10 - Rev.C
2011 ROHM Co., Ltd. All rights reserved.
Technical Note
7/8
BH3544F,BH3547F,BH3548F
●Notes for use
1) Numbers and data in entries are representative design values and are not guaranteed values of the items.
2) Although we are confident in recommending the sample application circuits, carefully check their characteristics further
when using them.
When modifying externally attached component constants before use, determine them so that they
have sufficient margins by taking into account variations in externally attached components and the Rohm LSI, not only
for static characteristics but also including transient characteristics.
3) Absolute maximum ratings
If applied voltage, operating temperature range, or other absolute maximum ratings are exceeded, the LSI may be
damaged.
Do not apply voltages or temperatures that exceed the absolute maximum ratings.
If you think of a case in
which absolute maximum ratings are exceeded, enforce fuses or other physical safety measures and investigate how
not to apply the conditions under which absolute maximum ratings are exceeded to the LSI.
4) GND potential
Make the GND pin voltage such that it is the lowest voltage even when operating below it.
Actually confirm that the
voltage of each pin does not become a lower voltage than the GND pin, including transient phenomena.
5) Thermal design
Perform thermal design in which there are adequate margins by taking into account the allowable power dissipation in
actual states of use.
6) Shorts between pins and misinstallation
When mounting the LSI on a board, pay adequate attention to orientation and placement discrepancies of the LSI.
If it is misinstalled and the power is turned on, the LSI may be damaged.
It also may be damaged if it is shorted by a
foreign substance coming between pins of the LSI or between a pin and a power supply or a pin and a GND.
7) Operation in strong magnetic fields
Adequately evaluate use in a strong magnetic field, since there is a possibility of malfunction.
8) Pop noise countermeasures
In order to prevent the pop noise that occurs when the power supply turns ON or OFF, make the rise and fall with
reference to the timing diagram shown below.
1)BH3544F/ BH3548F
Fig. 16
(A):Mute period (Use as pop noise countermeasure when power supply turns ON/OFF by makingVMUTE=Lo.)
(B):Mute cancellation period (This has a time constant because it is used by the externally attached C2 and R2 as
a pop noise countermeasure on mute cancellation, so be careful of the timing.)
(C):Mute start time (As on cancellation, this has a time constant.)
2)BH3547F
Fig. 17
(A):Before VCC rise (or at the same time as VCC) make mute cancelled (VMUTE=Hi).
(B):Soft mute period (This time can be set by externally attached R2 and C2)
VCC
Vmute
OUT
SG
(I
t
(Rise time)
(PLAY period)
(Fall period)
(MUTE period)
(A)
(B)
Rise time
PLAY period
Rise time
VCC
OUT
MUTE
A
BC
A
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