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參數(shù)資料
| 型號： | 74HC374N,652 |
| 廠商： | NXP Semiconductors |
| 文件頁數(shù)： | 7/8頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC FLIP FLOP OCT D 3STATE 20DIP |
| 產(chǎn)品培訓(xùn)模塊： | Logic Packages |
| 標(biāo)準(zhǔn)包裝： | 720 |
| 系列： | 74HC |
| 功能： | 標(biāo)準(zhǔn) |
| 類型： | D 型總線 |
| 輸出類型： | 三態(tài)非反相 |
| 元件數(shù)： | 1 |
| 每個元件的位元數(shù)： | 8 |
| 頻率 - 時鐘： | 83MHz |
| 延遲時間 - 傳輸： | 14ns |
| 觸發(fā)器類型： | 正邊沿 |
| 電源電壓： | 2 V ~ 6 V |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 通孔 |
| 封裝/外殼： | 20-DIP（0.300"，7.62mm） |
| 包裝： | 管件 |
74LVCH32245A
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 5 — 15 December 2011
7 of 15
NXP Semiconductors
74LVCH32245A
32-bit bus transceiver with direction pin; 5 V tolerant; 3-state
[1]
All typical values are measured at VCC = 3.3 V and Tamb =25 C.
[2]
The bus hold circuit is switched off when VI >VCC allowing 5.5 V on the input pin.
[3]
Valid for data inputs only. Control inputs do not have a bus hold circuit.
[4]
The specified sustaining current at the data inputs holds the input below the specified VI level.
[5]
The specified overdrive current at the data input forces the data input to the opposite logic input state.
10. Dynamic characteristics
IBHL
bus hold
LOW current
VCC = 1.65; VI = 0.58 V
10
-
10
-
A
VCC = 2.3; VI = 0.7 V
30
-
25
-
A
VCC = 3.0; VI = 0.8 V
75
-
60
-
A
IBHH
bus hold
HIGH
current
VCC = 1.65; VI = 1.07 V
10
-
10
-
A
VCC = 2.3; VI = 1.7 V
30
-
25
-
A
VCC = 3.0; VI = 2.0 V
75
-
60
-
A
IBHLO
bus hold
LOW
overdrive
current
VCC = 1.95 V
200
-
200
-
A
VCC = 2.7 V
300
-
300
-
A
VCC = 3.6 V
500
-
500
-
A
IBHHO
bus hold
HIGH
overdrive
current
VCC = 1.95 V
200
-
200
-
A
VCC = 2.7 V
300
-
300
-
A
VCC = 3.6 V
500
-
500
-
A
Table 6.
Static characteristics …continued
At recommended operating conditions. Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
40 C to +85 C
40 C to +125 C
Unit
Min
Typ[1]
Max
Min
Max
Table 7.
Dynamic characteristics
Voltages are referenced to GND (ground = 0 V). For test circuit see Figure 6.
Symbol Parameter
Conditions
Tamb = 40 C to +85 C 40 C to +125 C Unit
Min
Typ[1]
Max
Min
Max
tpd
propagation
delay
nAn to nBn; nBn to nAn; see Figure 4
VCC = 1.2 V
-
13.0
-
ns
VCC = 1.65 V to 1.95 V
1.5
5.2
12.2
1.5
13.8
ns
VCC = 2.3 V to 2.7 V
1.0
2.8
6.0
1.0
6.7
ns
VCC = 2.7 V
1.0
2.7
4.7
1.0
6.0
ns
VCC = 3.0 V to 3.6 V
1.0
2.4
4.5
1.0
6.0
ns
ten
enable time
nOE to nAn, nBn: see Figure 5
VCC = 1.2 V
-
15.0
-
ns
VCC = 1.65 V to 1.95 V
1.5
5.9
15.0
1.5
16.9
ns
VCC = 2.3 V to 2.7 V
1.0
3.3
7.9
1.0
8.8
ns
VCC = 2.7 V
1.5
3.5
6.7
1.5
8.5
ns
VCC = 3.0 V to 3.6 V
1.0
2.7
5.5
1.0
7.0
ns
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