參數資料
| 型號： | 74HC374N,652 |
| 廠商： | NXP Semiconductors |
| 文件頁數： | 2/8頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC FLIP FLOP OCT D 3STATE 20DIP |
| 產品培訓模塊： | Logic Packages |
| 標準包裝： | 720 |
| 系列： | 74HC |
| 功能： | 標準 |
| 類型： | D 型總線 |
| 輸出類型： | 三態(tài)非反相 |
| 元件數： | 1 |
| 每個元件的位元數： | 8 |
| 頻率 - 時鐘： | 83MHz |
| 延遲時間 - 傳輸： | 14ns |
| 觸發(fā)器類型： | 正邊沿 |
| 電源電壓： | 2 V ~ 6 V |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 通孔 |
| 封裝/外殼： | 20-DIP（0.300"，7.62mm） |
| 包裝： | 管件 |
December 1990
2
Philips Semiconductors
Product specication
Octal D-type ip-op; positive
edge-trigger; 3-state
74HC/HCT374
FEATURES
3-state non-inverting outputs for bus oriented
applications
8-bit positive, edge-triggered register
Common 3-state output enable input
Independent register and 3-state buffer operation
Output capability: bus driver
ICC category: MSI
GENERAL DESCRIPTION
The 74HC/HCT374 are high-speed Si-gate CMOS devices
and are pin compatible with low power Schottky TTL
(LSTTL). They are specified in compliance with JEDEC
standard no. 7A.
The 74HC/HCT374 are octal D-type flip-flops featuring
separate D-type inputs for each flip-flop and 3-state
outputs for bus oriented applications. A clock (CP) and an
output enable (OE) input are common to all flip-flops.
The 8 flip-flops will store the state of their individual
D-inputs that meet the set-up and hold times requirements
on the LOW-to-HIGH CP transition.
When OE is LOW, the contents of the 8 flip-flops are
available at the outputs. When OE is HIGH, the outputs go
to the high impedance OFF-state. Operation of the
OE input does not affect the state of the flip-flops.
The “374” is functionally identical to the “534”, but has
non-inverting outputs.
QUICK REFERENCE DATA
GND = 0 V; Tamb =25 °C; tr =tf = 6 ns
Notes
1. CPD is used to determine the dynamic power dissipation (PD in W):
PD =CPD × VCC2 × fi +∑ (CL × VCC2 × fo) where:
fi = input frequency in MHz
fo = output frequency in MHz
∑ (CL × VCC2 × fo) = sum of outputs
CL = output load capacitance in pF
VCC = supply voltage in V
2. For HC the condition is VI = GND to VCC
For HCT the condition is VI = GND to VCC 1.5 V
ORDERING INFORMATION
See
“74HC/HCT/HCU/HCMOS Logic Package Information”.
SYMBOL
PARAMETER
CONDITIONS
TYPICAL
UNIT
HC
HCT
tPHL/ tPLH
propagation delay CP to Qn
CL = 15 pF; VCC = 5 V
15
13
ns
fmax
maximum clock frequency
77
48
MHz
CI
input capacitance
3.5
pF
CPD
power dissipation capacitance per ip-op
notes 1 and 2
17
pF
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相關代理商/技術參數 |
參數描述 |
|---|---|
| 74HC374NSGS 89 | 制造商:SGS 功能描述:74HC374N |
| 74HC374NSGS89 | 制造商:SGS 功能描述:74HC374N |
| 74HC374PV-E | 制造商:Renesas Electronics 功能描述:Cut Tape 制造商:Renesas 功能描述:Flip Flop D-Type Bus Interface Pos-Edge 3-ST 1-Element 20-Pin PDIP Tube |
| 74HC374PW | 功能描述:觸發(fā)器 OCTAL D 3-S RoHS:否 制造商:Texas Instruments 電路數量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
| 74HC374PW,112 | 功能描述:觸發(fā)器 OCTAL D 3-S RoHS:否 制造商:Texas Instruments 電路數量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
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