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參數(shù)資料
| 型號(hào)： | 74HC148 |
| 廠商： | Fairchild Semiconductor Corporation |
| 英文描述： | 8-3 Line Priority Encoder |
| 中文描述： | 8-3線優(yōu)先編碼器 |
| 文件頁(yè)數(shù)： | 1/11頁(yè) |
| 文件大小： | 252K |
| 代理商： | 74HC148 |
M54HC148
M74HC148
October 1992
8 TO 3 LINE PRIORITY ENCODER
B1R
(Plastic Package)
ORDER CODES :
M54HC148F1R
M74HC148B1R
M74HC148M1R
M74HC148C1R
F1R
(CeramicPackage)
M1R
(MicroPackage)
C1R
(Chip Carrier)
PIN CONNECTIONS
(top view)
NC =
No Internal
Connection
INPUT AND OUTPUT EQUIVALENT CIRCUIT
DESCRIPTION
The M54/74HC148 is a high speed CMOS 8-TO-3
LINE PRIORITY ENCODER fabricated in silicon
gate C
2
MOS technology.
It hasthe same high speedperformance for LSTTL
combined with true CMOS low power consumption.
The M54/74HC148 encodes eight data lines to
three-line (4-2-1) binary (octal). Cascading circuitry
(enable input EI and enable output EO) has been
provided to allow octal expansion without the need
for external circuitry. Data inputs are active at the
low logic level.
All inputs are equipped with protection circuits
against static discharge and transient excess volt-
age.
.
HIGH SPEED
t
PD
= 15 ns(TYP.) AT V
CC
= 5 V
.
LOWPOWER DISSIPATION
I
CC
= 4
μ
A(MAX.) AT T
A
= 25
°
C
.
HIGH NOISE IMMUNITY
V
NIH
= V
NIL
= 28 % V
CC
(MIN.)
.
OUTPUT DRIVE CAPABILITY
10 LSTTL LOADS
.
SYMMETRICAL OUTPUT IMPEDANCE
I
OH
= I
OL
= 4 mA (MIN.)
.
BALANCEDPROPAGATION DELAYS
t
PLH
= t
PHL
.
WIDE OPERATING VOLTAGE RANGE
V
CC
(OPR) = 2 V TO6 V
.
PIN ANDFUNCTION COMPATIBLE
WITH 54/74LS148
1/11
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| 74HC148B1 | 制造商:STMicroelectronics 功能描述: |
| 74HC14A | 制造商:Motorola Inc 功能描述: 制造商:ON Semiconductor 功能描述: |
| 74HC14AD | 制造商: 功能描述: 制造商:undefined 功能描述: |
| 74HC14AFN | 制造商:Motorola Inc 功能描述: |
| 74HC14AN | 制造商: 功能描述: 制造商:undefined 功能描述: |
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