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參數(shù)資料
| 型號(hào)： | 74HC155 |
| 廠商： | Hitachi,Ltd. |
| 英文描述： | Dual 2-to-4-line Decoders/Demultiplexers |
| 中文描述： | 雙路2至4行解碼器/解復(fù)用器 |
| 文件頁數(shù)： | 1/11頁 |
| 文件大?。?/td> | 244K |
| 代理商： | 74HC155 |
M54HC155
M74HC155
December1992
DUAL 2 TO 4 LINE DECODER 3 TO 8 LINE DECODER
.
HIGH SPEED
t
PD
= 12 ns(TYP.) AT V
CC
= 5 V
.
LOWPOWER DISSIPATION
I
CC
= 4
μ
A(MAX.) AT T
A
= 25
°
C
.
HIGH NOISE IMMUNITY
V
NIH
= V
NIL
= 28 % V
CC
(MIN.)
.
OUTPUT DRIVE CAPABILITY
10 LSTTL LOADS
.
SYMMETRICAL OUTPUT IMPEDANCE
I
OH
= I
OL
= 4 mA (MIN.)
.
BALANCEDPROPAGATION DELAYS
t
PLH
= t
PHL
.
WIDE OPERATING VOLTAGE RANGE
V
CC
(OPR) = 2 V TO6 V
.
PIN ANDFUNCTION COMPATIBLE
WITH 54/74LS155
B1R
(Plastic Package)
ORDER CODES :
M54HC155F1R
M74HC155B1R
M74HC155M1R
M74HC155C1R
F1R
(CeramicPackage)
M1R
(MicroPackage)
C1R
(Chip Carrier)
PIN CONNECTIONS
(top view)
NC =
No Internal
Connection
DESCRIPTION
The M54/74HC155 isa high speedCMOS DUAL2-
TO-4 LINE DECODER fabricated in silicon gate
C
2
MOS technology.
It has the same high speed performance of LSTTL
combined with true CMOS low power consumption.
It features dual 1-TO-4 line demultiplexers with indi-
vidualstrobe inputs (1G and 2G), individual data in-
puts (1C and 2C) and common binary address
inputs (A and B).
Whenboth decodersareenabled bythestrobes, the
inverted output of 1C data and non-inverted output
of 2C data will be brought to the select output pins
of each sections. A 1-TO-8 line demultiplexer can
also be easily built up by providing a data signal to
both 1C and 2C inputs ; the output order from the
msb is 1Y3, 1Y2, 1Y1, 1Y0, 2Y3, 2Y2, 2Y1, 2Y0.
This device canbe used as a 2-to-4 line decoder or
a 3-to-8 line decoder when 1C is held high and 2C
is heldlow.
All inputs are equipped with protection circuits
against static discharge and transient excess volt-
age.
1/11
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