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參數(shù)資料
| 型號： | 74F776 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Pi-bus transceiver |
| 中文描述： | 丕總線收發(fā)器 |
| 文件頁數(shù)： | 5/12頁 |
| 文件大?。?/td> | 108K |
| 代理商： | 74F776 |
Philips Semiconductors
Product specification
74F776
Pi–bus transceiver
December 19, 1990
5
FUNCTION TABLE
INPUTS
LATCH
OUTPUTS
OPERATING MODE
An
Bn*
LE
OEA
OEB0
OEB1
STATE
An
Bn
H
X
L
L
L
L
H
Z
Z
A 3–state, data from A to B
L
X
L
L
L
L
L
Z
L
X
X
H
L
L
L
Qn
Z
Qn
A 3–state, latched data to B
–
–
L
H
L
L
(1)
(1)
(1)
Feedback: A to B, B to A
–
H
H
H
L
L
H (2)
H
Z(2)
Preconditioned latch enabling data transfer from B to A
–
L
H
H
L
L
H (2)
L
Z(2)
–
–
H
H
L
L
Qn
Qn
Qn
Latch state to A and B
H
X
L
L
H
X
H
Z
Z
L
X
L
L
H
X
L
Z
Z
B and A 3–state
X
X
H
L
H
X
Qn
Z
Z
–
H
L
H
H
X
H
H
Z
–
L
L
H
H
X
L
L
Z
B 3–state, data from B to A
–
H
H
H
H
X
Qn
H
Z
–
L
H
H
H
X
Qn
L
Z
H
X
L
L
X
H
H
Z
Z
L
X
L
L
X
H
L
Z
Z
B and A 3–state
X
X
H
L
X
H
Qn
Z
Z
–
H
L
H
X
H
H
H
Z
–
L
L
H
X
H
L
L
Z
B 3–state, data from B to A
–
H
H
H
X
H
Qn
H
Z
–
L
H
H
X
H
Qn
L
Z
Notes to function table
H =
High voltage level
L
=
Low voltage level
X =
Don’t care
–
=
Input not externally driven
Z =
High impedance ”off” state
Q
n
=
High or Low voltage level one setup time prior to the low–to–high LE transition.
(1) =
Condition will cause a feedback loop path: A to B and B to A.
(2) =
The latch must be preconditioned such that B inputs may assume a high or low level while OEB0 and OEB1 are low and LE is high.
B* =
Precaution should be taken to insure the B inputs do not float. If they do they are equal to low state.
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