參數(shù)資料
型號(hào): 74F776
廠商: NXP Semiconductors N.V.
英文描述: Pi-bus transceiver
中文描述: 丕總線收發(fā)器
文件頁(yè)數(shù): 3/12頁(yè)
文件大?。?/td> 108K
代理商: 74F776
Philips Semiconductors
Product specification
74F776
Pi–bus transceiver
December 19, 1990
3
PIN CONFIGURATION
1
2
3
4
5
6
7
8
9
10
19
20
21
22
23
24
25
26
27
28
V
CC
11
12
13
14
15
16
17
18
LE
B0
B1
GND
B2
B3
GND
B4
B5
B6
GND
B7
OEB1
OEB0
OEA
A0
GND
A1
A2
A3
GND
A4
A5
GND
A6
A7
VX
SF00422
PIN CONFIGURATION PLCC
4
3
2
1
28
27
25
24
23
22
21
20
11
10
9
8
7
6
18
16
17
15
14
13
26
19
12
5
PLCC
A1
A2
A3
GND
A4
A5
GND
V
CC
OEA
A0
GND
LE
B0
B1
GND
OEB0
B7
V
X
A7
A6
OEB1
GND
B2
B3
GND
B4
B5
B6
SF00423
IEC/IEEE SYMBOL
2
3
&
EN2
EN1
EN3
ID
27
26
24
23
21
20
19
17
5
6
7
9
10
12
13
3
15
16
28
2
SF00424
LOGIC SYMBOL
V
= Pin 1, V
= Pin 14
GND = Pin 4, 8, 11, 18, 22, 25
15
2
28
16
OEB0
OEA
LE
OEB1
B0 B1 B2 B3 B4 B5 B6 B7
27 26 24 23 21 20 19 17
3
5
6
7
9
10 12 13
A0 A1 A2 A3 A4 A5 A6 A7
SF00425
PIN DESCRIPTION
SYMBOL
PINS
TYPE
NAME AND FUNCTION
A0 – A7
3, 5, 6, 7, 9, 10, 12, 13
I/O
PNP latched input/3–state output (with V
X
control option)
Data input with special threshold circuitry to reject noise/ open collector output, high
current drive
B0 – B7
27, 26, 24, 23, 21, 20, 19, 17
I/O
OEB0
15
Input
Enables the B outputs when both pins are low
OEB1
16
Input
OEA
2
Input
Enables the A outputs when high
LE
28
Input
Latched when high (a special feature is built in for proper enabling times)
V
X
14
Input
Clamping voltage keeping V
OH
from rising above V
X
(V
X
= V
cc
for normal use)
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