- 您現(xiàn)在的位置：買(mǎi)賣(mài)IC網(wǎng) > PDF目錄360442 > 74F649 (NXP Semiconductors N.V.) Octal transceiver/register, non-inverting open-collector PDF資料下載
參數(shù)資料
| 型號(hào)： | 74F649 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Octal transceiver/register, non-inverting open-collector |
| 中文描述： | 八路收發(fā)器/寄存器，非反相開(kāi)路集電極 |
| 文件頁(yè)數(shù)： | 4/12頁(yè) |
| 文件大?。?/td> | 115K |
| 代理商： | 74F649 |
Philips Semiconductors
Product specification
74F647/74F649
Octal transceivers/registers (open-collector)
1992 Feb 28
4
INPUT AND OUTPUT LOADING AND FAN-OUT TABLE
PINS
DESCRIPTION
74F(U.L.)
HIGH/LOW
LOAD VALUE
HIGH/LOW
A0 - A7
A inputs
1.0/0.033
20
μ
A/20
μ
A
20
μ
A/20
μ
A
20
μ
A/20
μ
A
20
μ
A/20
μ
A
20
μ
A/20
μ
A
20
μ
A/20
μ
A
20
μ
A/20
μ
A
20
μ
A/20
μ
A
B0 - B7
B inputs
1.0/0.033
CPAB
A-to-B clock input
1.0/0.033
CPBA
B-to-A clock input
1.0/0.033
SAB
A-to-B select input
1.0/0.033
SBA
B-to-A select input
1.0/0.033
DIR
Data flow Directional control enable input
1.0/0.066
OE
Output Enable input
1.0/0.066
A0 - A7
A outputs
OC/106.7
OC/64mA
B0 - B7
NOTE:
B outputs
OC/106.7
OC/64mA
One (1.0) FAST Unit Load is defined as: 20
μ
A in the High state and 0.6mA in the Low state. OC = Open Collector
FUNCTION TABLE
INPUTS
CPAB
DATA I/O
OPERATING MODE
O
E
DIR
CPBA
SAB
SBA
A0-A7
B0-B7
X
X
↑
X
X
X
Input
Unspecified*
Store A, B unspecified*
Store A, B unspecified*
X
X
X
↑
↑
X
X
Unspecified*
Input
Store B, A unspecified*
Store B, A unspecified*
H
H
X
X
↑
H or L
H or L
X
X
X
X
Input
Input
Store A and B data
Isolation, hold storage
Store A and B data
Isolation, hold storage
L
L
L
L
X
X
X
H or L
X
X
L
H
Output
Input
Real time B data to A bus
Stored B data to A bus
Real time B data to A bus
Stored B data to A bus
L
L
H
H
H or L
X
X
X
L
H
X
X
Input
Output
Real time A data to B bus
Stored A data to B bus
Real time A data to B bus
Stored A data to B bus
H =
L
X =
↑
=
*
High voltage level
Low voltage level
Don’t care
Low-to-High clock transition
The data output function may be enabled or disabled by various signals at the OE and DIR inputs. Data input functions are always
enabled, i.e., data at the bus pins will be stored on every Low-to-High transition of the clock.
=
=
LOGIC DIAGRAM – 74F647
C1
1 of 8 Channels
1D
C1
1D
21
3
23
22
1
2
OE
DIR
CPBA
SBA
CPAB
SAB
To 7 other channels
A0
B0
4
20
SF01202
LOGIC DIAGRAM – 74F649
C1
1 of 8 Channels
1D
C1
1D
21
3
23
22
1
2
OE
DIR
CPBA
SBA
CPAB
SAB
To 7 other channels
A0
B0
4
20
SF01203
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 74F647 | Octal transceiver/register, non-inverting open-collector |
| 74F64 | 4-2-3-2-input AND-OR-invert gate |
| 74F646MSAX | Single 8-bit Bus Transceiver |
| 74F646SCX | Single 8-bit Bus Transceiver |
| 74F648SCX | Single 8-Bit Inverting Bus Transceiver |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 74F64DC | 制造商:Fairchild Semiconductor Corporation 功能描述: 制造商:Texas Instruments 功能描述: |
| 74F64LC | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| 74F64N | 制造商:NXP Semiconductors 功能描述: |
| 74F64PC | 功能描述:邏輯門(mén) AND/OR Invert Gate RoHS:否 制造商:Texas Instruments 產(chǎn)品:OR 邏輯系列:LVC 柵極數(shù)量:2 線路數(shù)量（輸入/輸出）:2 / 1 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 傳播延遲時(shí)間:3.8 ns 電源電壓-最大:5.5 V 電源電壓-最小:1.65 V 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DCU-8 封裝:Reel |
| 74F64SC | 功能描述:邏輯門(mén) AND/OR Invert Gate RoHS:否 制造商:Texas Instruments 產(chǎn)品:OR 邏輯系列:LVC 柵極數(shù)量:2 線路數(shù)量（輸入/輸出）:2 / 1 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 傳播延遲時(shí)間:3.8 ns 電源電壓-最大:5.5 V 電源電壓-最小:1.65 V 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DCU-8 封裝:Reel |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。