參數(shù)資料
型號(hào): 74F604
廠商: NXP Semiconductors N.V.
英文描述: Dual octal latch 3-State
中文描述: 雙八進(jìn)制鎖存器三態(tài)
文件頁(yè)數(shù): 6/7頁(yè)
文件大?。?/td> 53K
代理商: 74F604
Philips Semiconductors
Product specification
74F604
Dual octal latch (3-State)
1990 Mar 01
6
AC SETUP REQUIREMENTS
SYMBOL
PARAMETER
TEST
LIMITS
UNIT
CONDITION
V
CC
= +5V
T
= +25
°
C
C
L
= 50pF, R
L
= 500
V
CC
= +5V
±
10%
T
amb
= 0
°
C to +70
°
C
C
L
L
= 500
MIN
TYP
MAX
MIN
MAX
t
s
(H)
t
s
(L)
Setup time, High or Low
An, Bn to LE
Waveform 3
1.0
2.0
2.0
3.0
ns
t
h
(H)
t
h
(L)
Hold time, High or Low
An, Bn to LE
Waveform 3
0
1.0
0
1.5
ns
t
W
(L)
LE Pulse width, Low
Waveform 3
5.0
6.0
ns
AC WAVEFORMS
For all waveforms, V
M
= 1.5V.
The shaded areas indicate when the input is permitted to change for predictable output performance.
V
M
V
M
t
PLH
t
PHL
SELECT A/B
Qn
V
M
SF01119
V
M
Waveform 1. Propagation Delay, SELECT A/B To Output
(B latched data=Low. LE=H)
V
M
V
M
t
PLH
t
PHL
SELECT A/B
Qn
V
M
SF01120
V
M
Waveform 2. Propagation Delay, SELECT A/B to Output
(A latched data=Low. LE=H)
SF01121
V
M
V
M
V
M
V
M
V
M
An, Bn
LE
t
s
(H)
t
s
(L)
t
h
(L)
t
h
(H)
V
M
V
M
t
w
(L)
Waveform 3. Data Setup and Hold Times,
Latch Enable Pulse Width
V
M
V
M
V
M
t
PHZ
t
PZH
LE
Qn
V
OH
-0.3V
0V
SF01122
Waveform 4. 3-State Output Enable Time to High Level and
Output Disable Time from High Level
V
M
V
M
V
M
t
PLZ
t
PZL
LE
Qn
V
OL
+0.3V
SF01123
Waveform 5. 3-State Output Enable Time to Low Level and
Output Disable Time from Low Level
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