參數(shù)資料
型號: 74F598
廠商: NXP Semiconductors N.V.
英文描述: 8-bit shift register with input storage registers(3-State)(帶輸入存儲寄存的8位移位寄存器(三態(tài)))
中文描述: 8位輸入存儲寄存器(3態(tài))(帶輸入存儲寄存的移位寄存器的8位移位寄存器(三態(tài)))
文件頁數(shù): 6/14頁
文件大小: 115K
代理商: 74F598
Philips Semiconductors
Product specification
74F598
8-bit shift register with input storage registers (3-State)
1991 Oct 21
6
DC ELECTRICAL CHARACTERISTICS
(Over recommended operating free-air temperature range unless otherwise noted.)
SYMBOL
PARAMETER
TEST
LIMITS
TYP
2
UNIT
CONDITIONS
1
MIN
MAX
Qs
V
CC
= MIN,
V
IL
= MAX,
V
IL
= MAX,
I
OH
= –1mA
±
10%V
CC
2.5
V
V
OH
High-level output voltage
±
5%V
CC
2.7
3.4
V
I/On
V
IH
= MIN,
V
IL
= MAX,
I
OH
= –3mA
±
10%V
CC
2.4
V
±
5%V
CC
2.7
3.3
V
V
OL
Low-level output voltage
V
CC
= MIN, V
IL
= MAX,
V
IH
= MIN, I
OL
= MAX
V
CC
= MIN, I
I
= I
IK
V
CC
= MAX, V
I
= 7.0V
V
CC
= MAX, V
I
= 5.5V
V
CC
= MAX, V
I
= 2.7V
V
CC
= MAX, V
I
= 0.5V
±
10%V
CC
±
5%V
CC
0.30
0.50
V
0.30
0.50
V
V
IK
I
I
Input clamp voltage
–0.73
-1.2
V
μ
A
Input current at maximum input voltage
others
100
I/On
1
mA
I
IH
I
IL
High–level input current
20
μ
A
μ
A
Low–level input current
–20
I
OZH
+ I
IH
Off–state output current,
High–level voltage applied
I/On
V
CC
= MAX, V
O
= 2.7V
70
μ
A
I
OZL
+ I
IL
Off–state output current,
Low–level voltage applied
only
V
CC
= MAX, V
O
= 0.5V
–70
μ
A
I
OS
Short–circuit output current
3
V
CC
= MAX
-60
-150
mA
I
CCH
I
CCL
I
CCZ
68
100
mA
I
CC
Supply current (total)
V
CC
= MAX
80
110
mA
73
105
mA
Notes to DC electrical characteristics
1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type.
2. All typical values are at V
CC
= 5V, T
amb
= 25
°
C.
3. Not more than one output should be shorted at a time. For testing I
OS
, the use of High-speed test apparatus and/or sample-and-hold
techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting
of a High output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any
sequence of parameter tests, I
OS
tests should be performed last.
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