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參數(shù)資料
| 型號(hào)： | 74F595 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | 8-bit shift register with output laches 3-State |
| 中文描述： | 8位的移位寄存器輸出懈怠三態(tài) |
| 文件頁數(shù)： | 7/13頁 |
| 文件大?。?/td> | 99K |
| 代理商： | 74F595 |
Philips Semiconductors
Product specification
74F595
8-bit shift register with output latches (3-State)
1990 Apr 18
7
AC ELECTRICAL CHARACTERISTICS
LIMITS
SYMBOL
PARAMETER
TEST
CONDITION
V
CC
= +5V
T
= +25
°
C
C
L
= 50pF, R
L
= 500
V
CC
= +5V
±
10%
T
amb
= 0
°
C to +70
°
C
C
L
L
= 500
UNIT
MIN
TYP
MAX
MIN
MAX
f
MAX
Maximum clock frequency–SHCP to Qs
Waveform
NO TAG
115
135
90
MHz
t
PLH
t
PHL
Propagation delay
SHCP to Qs
Waveform
NO TAG
6.0
2.5
8.0
4.5
10.5
7.5
5.0
2.5
12.5
7.5
ns
t
PLH
t
PHL
Propagation delay
STCP to Q0–Q7
Waveform
NO TAG
5.5
3.0
8.0
5.0
10.0
8.0
4.5
3.0
13.0
8.5
ns
t
PHL
Propagation delay
SHR to Qs
Waveform
NO TAG
3.5
5.5
8.0
3.0
8.5
ns
t
PZH
t
PZL
t
PHZ
t
PLZ
Output Enable time
OE to Q0–Q7
Waveform 5
Waveform 6
3.5
3.0
5.5
5.5
9.0
8.5
2.5
2.5
10.5
10.5
ns
Output Disable time
OE to Q0–Q7
Waveform 5
Waveform 6
2.0
4.0
4.0
6.0
7.0
9.0
1.5
3.0
8.5
10.5
ns
AC SETUP REQUIREMENTS
LIMITS
SYMBOL
PARAMETER
TEST
CONDITION
V
CC
= +5V
T
amb
= +25
°
C
C
L
= 50pF, R
L
= 500
V
CC
= +5V
±
10%
T
amb
= 0
°
C to +70
°
C
C
L
= 50pF, R
L
= 500
UNIT
MIN
TYP
MAX
MIN
MAX
t
s
(H)
t
s
(L)
Setup time, High or Low
Ds to SHCP
Waveform 3
2.0
2.0
2.5
2.5
ns
t
h
(H)
t
h
(L)
Hold time, High or Low
Ds to SHCP
Waveform 3
0
0
0
0
ns
t
s
(L)
Setup time, Low
SHR to STCP
Waveform 3
4.5
5.0
ns
t
s
(H)
Setup time, High
SHCP to STCP
Waveform 4
4.5
5.0
ns
t
W
(H)
t
W
(L)
SHCP Pulse width,
High or Low
Waveform
NO TAG
3.5
4.0
4.0
4.0
ns
t
W
(H)
t
W
(L)
STCP Pulse width,
High or Low
Waveform
NO TAG
4.0
3.0
4.0
3.5
ns
t
W
(L)
SHR Pulse width, Low
Waveform
NO TAG
3.0
3.0
ns
t
REC
Recovery time,
SHR to SHCP
Waveform
NO TAG
3.0
3.0
ns
AC WAVEFORMS
For all waveforms, V
M
= 1.5V.
The shaded areas indicate when the input is permitted to change for predictable output performance.
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