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參數(shù)資料
| 型號： | 74F569SJ |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類： | 通用總線功能 |
| 英文描述： | 4-Bit Bidirectional Counter with 3-STATE Outputs |
| 中文描述： | F/FAST SERIES, SYN POSITIVE EDGE TRIGGERED 4-BIT BIDIRECTIONAL BINARY COUNTER, PDSO20 |
| 封裝： | 5.30 MM, EIAJ TYPE2, SOP-20 |
| 文件頁數(shù)： | 4/14頁 |
| 文件大?。?/td> | 130K |
| 代理商： | 74F569SJ |
Philips Semiconductors
Product specification
74F569
4-bit bidirectional binary synchronous counter (3-State)
1996 Jan 05
4
CET
SF01059
TC
CP
CET
TC
CET
TC
CET
TC
CET
TC
COUNT
CP
TO ALL STAGES
Figure 1. Multistage Counter with Ripple Carry
CET
SF01061
TC
CP
CET
TC
CEP
CET
TC
CEP
CET
TC
CEP
CET
CEP
COUNT
CP
TO ALL STAGES
LOW
Figure 2. Multistage Counter with Look-Ahead Carry
STATE DIAGRAM
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
COUNT DOWN
COUNT UP
SF01058
CC FUNCTION TABLE
INPUTS
OUTPUT
SR
PE
CEP
CET
TC*
CP
CC
L
X
X
X
X
X
H
X
L
X
X
X
X
H
X
X
H
X
X
X
H
X
X
X
H
X
X
H
X
X
X
X
H
X
H
H
= TC is generated internally
H = High voltage level
L = Low voltage level
X = Don’t care
=
Low Pulse
H
L
L
L
*
FUNCTION TABLE
INPUTS
OPERATING MODE
MR
SR
PE
CEP
CET
U/D
CP
L
X
X
X
X
X
X
Asynchronous reset
h
l
X
X
X
X
↑
Synchronous reset
h
h
l
X
X
X
↑
Parallel load
h
h
h
l
l
h
↑
Count Up (increment)
h
h
h
l
l
l
↑
Count Down (decrement)
h
H
H
H
X
X
X
Hold (do nothing)
h
H
H
X
H
X
X
H = High voltage level
h = High voltage level one setup time prior to the Low-to-High clock transition
L = Low voltage level
l
= Low voltage level one setup time prior to the Low-to-High clock transition
X = Don’t care
↑
= Low-to-High clock transition
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