參數(shù)資料
型號: 74F399SJX
廠商: FAIRCHILD SEMICONDUCTOR CORP
元件分類: 通用總線功能
英文描述: 2-Input Digital Multiplexer
中文描述: F/FAST SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO16
封裝: 5.30 MM, EIAJ TYPE2, SOP-16
文件頁數(shù): 3/10頁
文件大小: 178K
代理商: 74F399SJX
Functional Description
The ’F398 and ’F399 are high-speed quad 2-port registers.
They select four bits of data from either of two sources
(Ports) under control of a common Select input (S). The
selected data is transferred to a 4-bit output register syn-
chronous with the LOW-to-HIGH transition of the Clock in-
put (CP). The 4-bit D-type output register is fully edge-trig-
gered. The Data inputs (I
0x
, I
1x
) and Select input (S) must be
stable only a setup time prior to and hold time after the
LOW-to-HIGH transition of the Clock input for predictable
operation. The ’F398 has both Q and Q outputs.
Function Table
Inputs
Outputs
S
I
0
I
1
Q
Q
*
I
I
I
X
X
I
h
L
H
L
H
H
L
H
L
h
X
X
h
h
H
e
HIGH Voltage Level
L
e
LOW Voltage Level
h
e
HIGH Voltage Level one setup time prior to the LOW-to-HIGH clock
transition
I
e
LOW Voltage Level one setup time prior to the LOW-to-HIGH clock
transition
X
e
Immaterial
*
’F398 only
Logic Diagram
TL/F/9533–9
*
’F398 Only
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
3
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