參數資料
型號: 74AUP1G74GM,125
廠商: NXP Semiconductors
文件頁數: 6/28頁
文件大?。?/td> 0K
描述: IC F-F D-TYPE POS EDGE 8-XQFN
產品培訓模塊: Logic Packages
標準包裝: 1
系列: 74AUP
功能: 設置(預設)和復位
類型: D 型
輸出類型: 差分
元件數: 1
每個元件的位元數: 1
頻率 - 時鐘: 550MHz
延遲時間 - 傳輸: 2.2ns
觸發(fā)器類型: 正邊沿
輸出電流高,低: 4mA,4mA
電源電壓: 0.8 V ~ 3.6 V
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 8-XQFN 裸露焊盤
包裝: 標準包裝
產品目錄頁面: 830 (CN2011-ZH PDF)
其它名稱: 568-4386-6
74AUP1G74
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2014. All rights reserved.
Product data sheet
Rev. 9 — 6 January 2014
14 of 28
NXP Semiconductors
74AUP1G74
Low-power D-type flip-flop with set and reset; positive-edge trigger
[1]
All typical values are measured at nominal VCC.
[2]
tpd is the same as tPLH and tPHL.
[3]
CPD is used to determine the dynamic power dissipation (PD in W).
PD =CPD VCC2 fi N+ (CL VCC2 fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
(C
L VCC
2
f
o) = sum of outputs.
tW
pulse width
CP HIGH or LOW;
VCC = 1.1 V to 1.3 V
-
2.1
-
2.7
-
2.7
-
ns
VCC = 1.4 V to 1.6 V
-
1.1
-
1.5
-
1.5
-
ns
VCC = 1.65 V to 1.95 V
-
0.9
-
1.6
-
1.6
-
ns
VCC = 2.3 V to 2.7 V
-
0.6
-
1.7
-
1.7
-
ns
VCC = 3.0 V to 3.6 V
-
0.6
-
1.9
-
1.9
-
ns
SD or RD LOW;
VCC = 1.1 V to 1.3 V
-
4.2
-
11.3
-
11.5
-
ns
VCC = 1.4 V to 1.6 V
-
2.3
-
6.2
-
6.4
-
ns
VCC = 1.65 V to 1.95 V
-
1.8
-
4.8
-
5.0
-
ns
VCC = 2.3 V to 2.7 V
-
1.2
-
3.3
-
3.5
-
ns
VCC = 3.0 V to 3.6 V
-
1.1
-
2.6
-
2.8
-
ns
CPD
power
dissipation
capacitance
fi = 1 MHz;
VI =GND to VCC
VCC = 0.8 V
-
2.8
-
pF
VCC = 1.1 V to 1.3 V
-
2.9
-
pF
VCC = 1.4 V to 1.6 V
-
3.0
-
pF
VCC = 1.65 V to 1.95 V
-
3.0
-
pF
VCC = 2.3 V to 2.7 V
-
3.5
-
pF
VCC = 3.0 V to 3.6 V
-
3.9
-
pF
Table 9.
Dynamic characteristics …continued
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 10.
Symbol Parameter
Conditions
Tamb = 25 C
Tamb = 40 C to +125 C
Unit
Min
Typ[1] Max
Min
Max
(85
C)
Min
Max
(125
C)
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