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參數(shù)資料
| 型號： | 74ALVCH162373 |
| 廠商： | Fairchild Semiconductor Corporation |
| 英文描述： | Quadruple Bus Buffer Gates With 3-State Outputs 14-PDIP -40 to 85 |
| 中文描述： | 低電壓16位透明鎖存與Bushold和26з在輸出串聯(lián)電阻 |
| 文件頁數(shù)： | 1/6頁 |
| 文件大?。?/td> | 96K |
| 代理商： | 74ALVCH162373 |
2001 Fairchild Semiconductor Corporation
DS500708
www.fairchildsemi.com
November 2001
Revised November 2001
7
74ALVCH162373
Low Voltage 16-Bit Transparent Latch with Bushold
and 26
Series Resistors in Outputs
General Description
The ALVCH162373 contains sixteen non-inverting latches
with 3-STATE outputs and is intended for bus oriented
applications. The device is byte controlled. The flip-flops
appear to be transparent to the data when the Latch enable
(LE) is HIGH. When LE is LOW, the data that meets the
setup time is latched. Data appears on the bus when the
Output Enable (OE) is LOW. When OE is HIGH, the out-
puts are in a high impedance state.
The ALVCH162373 data inputs include active bushold cir-
cuitry, eliminating the need for external pull-up resistors to
hold unused or floating data inputs at a valid logic level.
The ALVCH162373 is also designed with 26
series resis-
tors in the outputs. This design reduces line noise in appli-
cations such as memory address driver, clock drivers and
bus transceivers/transmitters.
The 74ALVCH162373 is designed for low voltage (1.65V to
3.6V) V
CC
applications with output compatibility up to 3.6V.
The 74ALVCH162373 is fabricated with an advanced
CMOS technology to achieve high speed operation while
maintaining low CMOS power dissipation.
Features
I
1.65V to 3.6V V
CC
supply operation
I
3.6V tolerant control inputs and outputs
I
Bushold on data inputs eliminates the need for external
pull-up/pull-down resistors
I
26
series resistors in outputs
I
t
PD
(I
n
to O
n
)
3.8 ns max for 3.0V to 3.6V V
CC
5.0 ns max for 2.3V to 2.7V V
CC
9.0 ns max for 1.65V to 1.95V V
CC
I
Uses patented noise/EMI reduction circuitry
I
Latchup conforms to JEDEC JED78
I
ESD performance:
Human body model
>
2000V
Machine model
>
200V
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
Pin Descriptions
Ordering Number Package Number
74ALVCH162373T
Package Description
MTD48
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Pin Names
Description
OE
n
LE
n
I
0
–
I
15
O
0
–
O
15
Output Enable Input (Active LOW)
Latch Enable Input
Bushold Inputs
Outputs
相關PDF資料 |
PDF描述 |
|---|---|
| 74ALVCH162373T | Quadruple Bus Buffer Gates With 3-State Outputs 14-SO -40 to 85 |
| 74ALVCH162374 | Quadruple Bus Buffer Gates With 3-State Outputs 14-SO -40 to 85 |
| 74ALVCH162374T | Low Voltage 16-Bit D-Type Flip-Flop with Bushold and 26з Series Resistors in Outputs |
| 74ALVCH16244 | Quadruple Bus Buffer Gates With 3-State Outputs 14-TSSOP -40 to 85 |
| 74ALVCH16244T | Quadruple Bus Buffer Gates With 3-State Outputs 14-TSSOP -40 to 85 |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| 74ALVCH162373A4PA | 制造商:Rochester Electronics LLC 功能描述: 制造商:Integrated Device Technology Inc 功能描述: |
| 74ALVCH162373DLG4 | 功能描述:閉鎖 16B Transp D-Type RoHS:否 制造商:Micrel 電路數(shù)量:1 邏輯類型:CMOS 邏輯系列:TTL 極性:Non-Inverting 輸出線路數(shù)量:9 高電平輸出電流: 低電平輸出電流: 傳播延遲時間: 電源電壓-最大:12 V 電源電壓-最小:5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:SOIC-16 封裝:Reel |
| 74ALVCH162373GRE4 | 功能描述:閉鎖 16B Transp D-Type RoHS:否 制造商:Micrel 電路數(shù)量:1 邏輯類型:CMOS 邏輯系列:TTL 極性:Non-Inverting 輸出線路數(shù)量:9 高電平輸出電流: 低電平輸出電流: 傳播延遲時間: 電源電壓-最大:12 V 電源電壓-最小:5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:SOIC-16 封裝:Reel |
| 74ALVCH162373GRG4 | 功能描述:閉鎖 16B Trans D-Type Latch RoHS:否 制造商:Micrel 電路數(shù)量:1 邏輯類型:CMOS 邏輯系列:TTL 極性:Non-Inverting 輸出線路數(shù)量:9 高電平輸出電流: 低電平輸出電流: 傳播延遲時間: 電源電壓-最大:12 V 電源電壓-最小:5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:SOIC-16 封裝:Reel |
| 74ALVCH162373LRG4 | 功能描述:閉鎖 16B Transp D-Type RoHS:否 制造商:Micrel 電路數(shù)量:1 邏輯類型:CMOS 邏輯系列:TTL 極性:Non-Inverting 輸出線路數(shù)量:9 高電平輸出電流: 低電平輸出電流: 傳播延遲時間: 電源電壓-最大:12 V 電源電壓-最小:5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:SOIC-16 封裝:Reel |
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