參數(shù)資料
型號(hào): 74ALVCH162374T
廠商: FAIRCHILD SEMICONDUCTOR CORP
元件分類: 通用總線功能
英文描述: Low Voltage 16-Bit D-Type Flip-Flop with Bushold and 26з Series Resistors in Outputs
中文描述: ALVC/VCX/A SERIES, DUAL 8-BIT DRIVER, TRUE OUTPUT, PDSO48
封裝: 6.10 MM, MO-153, TSSOP-48
文件頁(yè)數(shù): 1/6頁(yè)
文件大?。?/td> 94K
代理商: 74ALVCH162374T
2002 Fairchild Semiconductor Corporation
DS500628
www.fairchildsemi.com
September 2001
Revised February 2002
7
74ALVCH162374
Low Voltage 16-Bit D-Type Flip-Flop with Bushold
and 26
Series Resistors in Outputs
General Description
The ALVCH162374 contains sixteen non-inverting D-type
flip-flops with 3-STATE outputs and is intended for bus ori-
ented applications. The device is byte controlled. A buff-
ered clock (CP) and output enable (OE) are common to
each byte and can be shorted together for full 16-bit opera-
tion.
The ALVCH162374 data inputs include active bushold cir-
cuitry, eliminating the need for external pull-up resistors to
hold unused or floating data inputs at a valid logic level.
The 74ALVCH162374 is also designed with 26
series
resistors in the outputs. This design reduces line noise in
applications such as memory address drivers, clock drivers
and bus transceivers/transmitters.
The 74ALVCH162374 is designed for low voltage
(1.65V to 3.6V) V
CC
applications with output compatibility
up to 3.6V.
The 74ALVCH162374 is fabricated with an advanced
CMOS technology to achieve high speed operation while
maintaining low CMOS power dissipation.
Features
I
1.65V to 3.6V V
CC
supply operation
I
3.6V tolerant control inputs and outputs
I
Bushold data inputs eliminates the need for external
pull-up/pull-down resistors
I
26
series resistors in outputs
I
t
PD
(CLK to O
n
)
4.6 ns max for 3.0V to 3.6V V
CC
5.4 ns max for 2.3V to 2.7V V
CC
9.6 ns max for 1.65V to 1.95V V
CC
I
Uses patented noise/EMI reduction circuitry
I
Latch-up conforms to JEDEC JED78
I
ESD performance:
Human body model
>
2000V
Machine model
>
200V
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
Pin Descriptions
Order Number
Package
Number
MTD48
Package Descriptions
74ALVCH162374T
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Pin Names
Description
OE
n
CP
n
I
0
I
15
O
0
O
15
Output Enable Input (Active LOW)
Clock Pulse Input
Bushold Inputs
Outputs
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74ALVCH16240 制造商:TI 制造商全稱:Texas Instruments 功能描述:16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS
74ALVCH16240/D 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Low-Voltage 1.8/2.5/3.3V 16-Bit Buffer
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