參數(shù)資料
型號: 74AC280SCX
廠商: FAIRCHILD SEMICONDUCTOR CORP
元件分類: 通用總線功能
英文描述: Parity Generator/Checker
中文描述: AC SERIES, 9-BIT PARITY GENERATOR/CHECKER, COMPLEMENTARY OUTPUT, PDSO14
封裝: 0.150 INCH, MS-120, SOIC-14
文件頁數(shù): 1/8頁
文件大?。?/td> 64K
代理商: 74AC280SCX
74AC280
9 BIT PARITY GENERATOR
December 1998
I
HIGHSPEED:t
PD
=4ns(TYP.)atV
CC
=5V
I
LOWPOWERDISSIPATION:
I
CC
=4
μ
A(MAX.) at T
A
=25
o
C
I
HIGHNOISEIMMUNITY:
V
NIH
= V
NIL
=28%V
CC
(MIN.)
I
50
TRANSMISSIONLINEDRIVING
CAPABILITY
I
SYMMETRICALOUTPUTIMPEDANCE:
|I
OH
| = I
OL
= 24mA(MIN)
I
BALANCEDPROPAGATIONDELAYS:
t
PLH
t
PHL
I
OPERATINGVOLTAGERANGE:
V
CC
(OPR)= 2Vto 6V
I
PINANDFUNCTION COMPATIBLEWITH
74SERIES280
I
IMPROVEDLATCH-UP IMMUNITY
DESCRIPTION
The AC280 is an advanced high-speed CMOS 9
BIT
PARITY
GENERATOR
sub-micron silicon gate and double-layer metal
wiring C
2
MOS technology. It is ideal for low
power
applications
mantaining
operation similar to equivalent Bipolar Schottky
TTL.
It is composed of nine data inputs (A to I) and
fabricated
with
high
speed
odd/evenparity outputs (
Σ
ODD and
Σ
EVEN). The
nine data inputs control the output conditions.
When the number of high level input is odd,
Σ
ODD output is kept high and
Σ
EVEN output low.
Conservely, when the output is even,
Σ
EVEN
outputis kept high and
Σ
ODDlow.
The IC generates either odd or even parity
making it flexibleapplication.
The word-length capability is easily expanded by
cascading.
All
inputs
and
outputs are
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
equipped with
PIN CONNECTION AND IEC LOGIC SYMBOLS
ORDER CODES :
74AC280B
74AC280M
M
(Micro Package)
B
(Plastic Package)
1/8
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