參數(shù)資料
型號: 74AC299TTR
廠商: 意法半導體
元件分類: 通用總線功能
英文描述: KJA SERIES III
中文描述: 8位皮普移位寄存器帶異步清零
文件頁數(shù): 1/13頁
文件大?。?/td> 465K
代理商: 74AC299TTR
1/13
April 2001
I
HIGH SPEED:
f
MAX
= 240MHz (TYP.) at V
CC
= 5V
LOW POWER DISSIPATION:
I
CC
= 8
μ
A(MAX.) at T
A
=25°C
HIGH NOISE IMMUNITY:
V
NIH
= V
NIL
= 28 % V
CC
(MIN.)
50
TRANSMISSION LINE DRIVING
CAPABILITY
SYMMETRICAL OUTPUT IMPEDANCE:
|I
OH
| = I
OL
= 24mA (MIN)
BALANCED PROPAGATION DELAYS:
t
PLH
t
PHL
OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 2V to 6V
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 299
IMPROVED LATCH-UP IMMUNITY
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DESCRIPTION
The 74AC299 is an advanced high-speed CMOS
8-BIT PIPO SHIFT REGISTER (3-STATE)
fabricated with sub-micron silicon gate and
double-layer metal wiring C
2
MOS technology.
These devices have four modes (HOLD, SHIFT
LEFT, SHIFT RIGHT and LOAD DATA). Each
mode is chosen by two function select inputs (S0,
S1) as shown in the Truth Table. When one or
both enable inputs, (G1, G2) are high, the eight
input/output terminals are in the high-impedance
state; however sequential operation or clearing of
the register is not affected. Clear function is
asynchronous to clock.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
74AC299
8 BIT PIPO SHIFT REGISTER
WITH ASYNCHRONOUS CLEAR
PIN CONNECTION AND IEC LOGIC SYMBOLS
ORDER CODES
PACKAGE
TUBE
T & R
DIP
SOP
TSSOP
74AC299B
74AC299M
74AC299MTR
74AC299TTR
TSSOP
DIP
SOP
相關PDF資料
PDF描述
74AC299MTR 8 BIT PIPO SHIFT REGISTER WITH ASYNCHRONOUS CLEAR
74AC299 8 BIT PIPO SHIFT REGISTER WITH ASYNCHRONOUS CLEAR
74AC299B 8 BIT PIPO SHIFT REGISTER WITH ASYNCHRONOUS CLEAR
74AC299M 8 BIT PIPO SHIFT REGISTER WITH ASYNCHRONOUS CLEAR
74AC299PC 8-Input Universal Shift/Storage Register
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