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參數(shù)資料
| 型號： | 73S8014RN-ILR/F |
| 廠商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分類： | 模擬信號調理 |
| 英文描述： | SPECIALTY ANALOG CIRCUIT, PDSO20 |
| 封裝： | LEAD FREE, SOP-20 |
| 文件頁數(shù)： | 8/28頁 |
| 文件大小： | 389K |
| 代理商： | 73S8014RN-ILR/F |
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73S8014RN Data Sheet
DS_8014RN_014
16
Rev. 1.0
3.5
Card Power Supply
The card power supply is internally provided by the LDO regulator, and controlled by the digital ISO-7816-3
sequencer.
3.6
On-Chip Oscillator and Card Clock
The 73S8014RN devices have an on-chip oscillator that can generate the smart card clock using an external
crystal (connected between the pins XTALIN and XTALOUT) to set the oscillator frequency. When the clock
signal is available from another source, it can be connected to the pin XTALIN, and the pin XTALOUT should be
left unconnected. The 73S8014RN is capable of generating the 4.5, 6.75 and 13.5MHz NDS clock frequencies
using a crystal or external source set at 27MHz.
The card clock frequency may be chosen between 4 different division rates, defined by digital inputs CLKDIV 1
and CLKDIV 2, as per the following table:
CLKDIV1
CLKDIV2
CLK
Max XTALIN
0
1/6
XTALIN
27MHz
0
1
XTALIN
27MHz
1
0
XTALIN
20MHz
1
XTALIN
27MHz
3.7
Activation Sequence
The 73S8014RN smart card interface ICs have an internal 10ms delay on the application of VDD where VDD >
VDDF. No activation is allowed during this 10ms period. The CMDVCC (edge triggered) signal must then be set
low to activate the card. In order to initiate activation, the card must be present; there can be no VDD fault.
The following steps show the activation sequence and the timing of the card control signals when the system
controller sets CMDVCC low while the RSTIN is low:
-
CMDVCC is set low at t0.
-
VCC will rise to the selected level and then the internal VCC control circuit checks the presence of VCC at
the end of t1. In normal operation, the voltage VCC to the card becomes valid before t1. If VCC is not valid
at t1, the OFF goes low to report a fault to the system controller, and VCC to the card is shut off.
-
Turn I/O to reception mode at t2.
-
CLK is applied to the card at t3.
-
RST is a copy of RSTIN after t3.
CMDVCC
VCC
I/O
CLK
RSTIN
t1
t2
t3
RST
t0
t1 = 0.510 ms (timing by 1.5MHz internal oscillator)
t2 = 1.5μs, I/O goes to reception state
t3 = >0.5μs, CLK starts, RST to become the copy of RSTIN
Figure 4: Activation Sequence – RSTIN Low When
CMDVCC Goes Low
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| 73S8014RT | 制造商:TERIDIAN 制造商全稱:TERIDIAN 功能描述:Smart Card Interface |
| 73S8014RT-DB | 功能描述:BOARD DEMO 73S8010RT 20-SOIC RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評估演示板和套件 系列:* 產品培訓模塊:Obsolescence Mitigation Program 標準包裝:1 系列:- 主要目的:電源管理，電池充電器 嵌入式:否 已用 IC / 零件:MAX8903A 主要屬性:1 芯鋰離子電池 次要屬性:狀態(tài) LED 已供物品:板 |
| 73S8014RT-IL/F | 功能描述:輸入/輸出控制器接口集成電路 Smart Card Interface Comp w/8024 RoHS:否 制造商:Silicon Labs 產品: 輸入/輸出端數(shù)量: 工作電源電壓: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-64 封裝:Tray |
| 73S8014RT-IL/F1 | 功能描述:輸入/輸出控制器接口集成電路 RoHS:否 制造商:Silicon Labs 產品: 輸入/輸出端數(shù)量: 工作電源電壓: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-64 封裝:Tray |
| 73S8014RT-IL/F2 | 功能描述:輸入/輸出控制器接口集成電路 RoHS:否 制造商:Silicon Labs 產品: 輸入/輸出端數(shù)量: 工作電源電壓: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-64 封裝:Tray |
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