參數(shù)資料
型號(hào)： 73S8010R-IMR/F
廠商： MAXIM INTEGRATED PRODUCTS INC
元件分類(lèi)： 模擬信號(hào)調(diào)理
英文描述： SPECIALTY ANALOG CIRCUIT, QCC32
封裝： 5 X 5 MM, 0.80 MM HEIGHT, LEAD FREE, QFN-32
文件頁(yè)數(shù)： 2/25頁(yè)
文件大?。?/td> 336K
代理商： 73S8010R-IMR/F
73S8010R Data Sheet
DS_8010R_022
10
Rev. 1.6
Symbol
Parameter
Condition
Min
Nom
Max
Unit
Interface Requirements – Data Signals: I/O, AUX1, AUX2, and host interfaces: I/OUC, AUX1UC,
AUX2UC. ISHORTL, ISHORTH, and VINACT requirements do not pertain to I/OUC, AUX1UC, AUX2UC.
VOH
Output level, high (I/O,
AUX1, AUX2)
IOH = 0 A
0.9 * VCC
–
VCC+0.1
V
IOH = -40 A
0.75 * VCC
–
VCC+0.1
V
VOH
Output level, high
(I/OUC, AUX1UC,
AUX2UC)
IOH = 0 A
0.9 * VCC
–
VDD+0.1
V
IOH = -40 A
0.75 * VCC
–
VDD+0.1
V
VOL
Output level, low
IOL = 1 mA
–
0.3
V
VIH
Input level, high (I/O,
AUX1, AUX2)
1.8
–
VCC+0.30
V
VIH
Input level, high (I/OUC,
AUX1UC, AUX2UC)
1.8
–
VCC+0.30
V
VIL
Input level, low
-0.3
–
0.8
V
VINACT
Output voltage when
outside of session
IOL = 0
–
0.1
V
IOL = 1 mA
–
0.3
V
ILEAK
Input leakage
VIH = VCC
–
10
A
IIL
Input current, low
VIL = 0
–
0.65
mA
ISHORTL
Short circuit output
current
For output low, shorted
to VCC through 33
–
15
mA
ISHORTH
Short circuit output
current
For output high, shorted
to ground through 33
–
15
mA
tR, tF
Output rise time, fall
time
For I/O, AUX1, AUX2,
CL = 80 pF, 10% to 90%.
For I/OUC, AUX1UC,
AUX2UC, CL=50 pF,
10% to 90%.
–
100
ns
tIR, tIF
Input rise, fall times
–
1
s
RPU
Internal pull-up resistor
Output stable for >200 ns
8
11
14
k
FDMAX
Maximum data rate
–
1
MHz
TFDIO
Delay, I/O to I/OUC,
I/OUC to I/O, AUX1 to
AUX1UC, AUX1UC to
AUX1, AUX2 to AUX2UC,
AUX2UC to AUX2
Falling edge from master
to slave measured at
50% point
60
100
200
ns
TRDIO
Delay, I/O to I/OUC,
I/OUC to I/O, AUX1 to
AUX1UC, AUX1UC to
AUX1, AUX2 to AUX2UC,
AUX2UC to AUX2
Rising edge from master
to slave measured at
50% point
–
25
90
ns
CIN
Input capacitance
–
10
pF
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