- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄68812 > 73S1209F-68IMR/F (MAXIM INTEGRATED PRODUCTS INC) POWER SUPPLY MANAGEMENT CKT, QCC68 PDF資料下載
參數(shù)資料
| 型號： | 73S1209F-68IMR/F |
| 廠商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分類： | 電源管理 |
| 英文描述： | POWER SUPPLY MANAGEMENT CKT, QCC68 |
| 封裝： | LEAD FREE, QFN-68 |
| 文件頁數(shù)： | 122/123頁 |
| 文件大?。?/td> | 1385K |
| 代理商： | 73S1209F-68IMR/F |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁第117頁第118頁第119頁第120頁第121頁當(dāng)前第122頁第123頁
73S1209F Data Sheet
DS_1209F_004
Block Guard Time Register (BGT): 0xFE16
0x10
This register contains the Extra Guard Time Value (EGT) most-significant bit. The Extra Guard Time
indicates the minimum time between the leading edges of the start bit of consecutive characters. The
delay is depends on the T=0/T=1 mode. Used in transmit mode. This register also contains the Block
Guard Time (BGT) value. Block Guard Time is the minimum time between the leading edge of the start
bit of the last character received and the leading edge of the start bit of the first character transmitted.
This should not be set less than the character length. The transmission of the first character will be held
off until BGT has elapsed regardless of the TX data and TX/RX control bit timing.
Table 96: The BGT Register
MSB
LSB
EGT.8
–
BGT.4
BGT.3
BGT.1
BGT.2
BGT.0
Bit
Symbol
Function
BGT.7
EGT.8
Most-significant bit for 9-bit EGT timer. See EGT below.
BGT.6
–
BGT.5
–
BGT.4
Time in ETUs between the start bit of the last received character to start bit
of the first character transmitted to the smart card. Default value is 22.
BGT.3
BGT.2
BGT.1
BGT.0
Extra Guard Time Register (EGT): 0xFE17
0x0C
This register contains the Extra Guard Time Value (EGT) least-significant byte. The Extra Guard Time
indicates the minimum time between the leading edges of the start bit of consecutive characters. The
delay is depends on the T=0/T=1 mode. Used in transmit mode.
Table 97: The EGT Register
MSB
LSB
EGT.7
EGT.6
EGT.5
EGT.4
EGT.3
EGT.1
EGT.2
EGT.0
Bit
Function
EGT.7
Time in ETUs between start bits of consecutive characters. In T=0 mode, the minimum is
1. In T=0, the leading edge of the next start bit may be delayed if there is a break detected
from the smart card. Default value is 12. In T=0 mode, regardless of the value loaded, the
minimum value is 12, and for T=1 mode, the minimum value is 11.
EGT.6
EGT.5
EGT.4
EGT.3
EGT.2
EGT.1
EGT.0
98
Rev. 1.2
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 73S1209F-44IMR/F | POWER SUPPLY MANAGEMENT CKT, QCC44 |
| 73S1209F-68IMR/F | POWER SUPPLY MANAGEMENT CKT, QCC68 |
| 73S1209F-68IM/F | POWER SUPPLY MANAGEMENT CKT, QCC68 |
| 73S1209F-44IMR/F | POWER SUPPLY MANAGEMENT CKT, QCC44 |
| 73S1209F-44IM/F | POWER SUPPLY MANAGEMENT CKT, QCC44 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 73S1209F-68M/F/P1 | 功能描述:8位微控制器 -MCU Contained 80515-SoC Serial Hst Interface RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| 73S1209F-EB | 功能描述:開發(fā)板和工具包 - 8051 73S1209F Eval Brd (Doc. Cd, Cable) RoHS:否 制造商:Silicon Labs 產(chǎn)品:Development Kits 工具用于評估:C8051F960, Si7005 核心: 接口類型:USB 工作電源電壓: |
| 73S1209F-IM44 DK | 制造商:Maxim Integrated Products 功能描述:Development Boards & Kits - 8051 73S1209F Dev Kit Eval Bd Ice Cable Cd |
| 73S1209F-IM44 EB | 制造商:Maxim Integrated Products 功能描述:Development Boards & Kits - 8051 73S1209F Eval Brd Eval Bd Doc Cd Cable |
| 73S1209F-IM68 DK | 制造商:Maxim Integrated Products 功能描述:Development Boards & Kits - 8051 73S1209F Dev Kit Eval Bd Ice Cable Cd |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。