參數(shù)資料
型號： 73S1209F-68IMR/F/P
廠商： Maxim Integrated Products
文件頁數(shù)： 50/123頁
文件大小： 0K
描述： IC SMART CARD READER PROG 68-QFN
產(chǎn)品培訓模塊： Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝： 2,500
系列： 73S12xx
核心處理器： 80515
芯體尺寸： 8-位
速度： 24MHz
連通性： I²C，智能卡，UART/USART
外圍設備： LED，POR，WDT
輸入/輸出數(shù)： 9
程序存儲器容量： 32KB（32K x 8）
程序存儲器類型： 閃存
RAM 容量： 2K x 8
電壓 - 電源 (Vcc/Vdd)： 2.7 V ~ 5.5 V
振蕩器型： 內部
工作溫度： -40°C ~ 85°C
封裝/外殼： 68-VFQFN 裸露焊盤
包裝： 帶卷 (TR)
73S1209F Data Sheet
DS_1209F_004
1.7.3 Interrupts
The 80515 core provides 10 interrupt sources with four priority levels. Each source has its own request
flag(s) located in a special function register (TCON, IRCON, and SCON). Each interrupt requested by the
corresponding flag can be individually enabled or disabled by the enable bits in SFRs IEN0, IEN1, and
IEN2. Some of the 10 sources are multiplexed in order to expand the number of interrupt sources.
These will be described in more detail in the respective sections.
IEN2. Some of the 10 sources are multiplexed in order to expand the number of interrupt sources.
These will be described in more detail in the respective sections.
External interrupts are the interrupts external to the 80515 core, i.e. signals that originate in other parts of
the 73S1209F, for example the USR I/O, smart card interface, analog comparators, etc. The external
interrupt configuration is shown in Figure 8.
External interrupts are the interrupts external to the 80515 core, i.e. signals that originate in other parts of
the 73S1209F, for example the USR I/O, smart card interface, analog comparators, etc. The external
interrupt configuration is shown in Figure 8.
USR
Int
Ctl
USR
Int
Ctl
USR
Int
Ctl
SCInt
Wait Timeout
Card Event
RxData
TX_Event
Tx_Sent
TX_Error
RX_Error
Card_Det
VCC_OK
CRDCtl
VccCTL
+
SCIE
VCC_TMR
Analog
Comp
KeyPad
I2C
USR
Int
Ctl
t0
t1
int0
int1
USR
Pads
USR0
USR7
USR6
USR5
USR4
USR3
USR2
USR1
INT2
INT3
INT
Pads
int2
int3
Serial
Ch 0
Serial
Ch 1
SerChan 0 int
SerChan 1 int
int4
INT5
Ctl
INT6
Ctl
int5
int6
+
During STOP, IDLE
when PWRDN bit is set
MPU
CORE
VDD_Fault
+
Delay
Clear PWRDN bit
PDMUXCtl
1
0
Figure 8: External Interrupt Configuration
32
Rev. 1.2
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相關代理商/技術參數(shù)
參數(shù)描述
73S1209F-68M/F/P1 功能描述:8位微控制器 -MCU Contained 80515-SoC Serial Hst Interface RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT
73S1209F-EB 功能描述:開發(fā)板和工具包 - 8051 73S1209F Eval Brd (Doc. Cd, Cable) RoHS:否 制造商:Silicon Labs 產(chǎn)品:Development Kits 工具用于評估:C8051F960, Si7005 核心: 接口類型:USB 工作電源電壓:
73S1209F-IM44 DK 制造商:Maxim Integrated Products 功能描述:Development Boards & Kits - 8051 73S1209F Dev Kit Eval Bd Ice Cable Cd
73S1209F-IM44 EB 制造商:Maxim Integrated Products 功能描述:Development Boards & Kits - 8051 73S1209F Eval Brd Eval Bd Doc Cd Cable
73S1209F-IM68 DK 制造商:Maxim Integrated Products 功能描述:Development Boards & Kits - 8051 73S1209F Dev Kit Eval Bd Ice Cable Cd
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