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參數(shù)資料
| 型號： | 73M2910L-IG |
| 英文描述： | Microcontroller |
| 中文描述： | 微控制器 |
| 文件頁數(shù)： | 6/41頁 |
| 文件大小： | 509K |
| 代理商： | 73M2910L-IG |
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73M2910L
Microcontroller
REGISTER DESCRIPTION
(continued)
6
USR PROGRAMMABLE I/O
Port Control USR1, USR2, USR3, USR4, USR5
The core chip provides 32 user I/O pins. Each pin is programmed separately as either an input or as an output
by a bit in a direction register. If the bit in the direction register is set to a 1, the I/O control will treat the
corresponding pin as an input. If it is a 0, the pin will be treated as an output whose value is determined by the
port data register. The USR1 and USR2 port registers are accessed through the internal SFR bus. The USR3
and USR4 ports are accessed through the external memory bus by a MOVX instruction. The USR4 port
provides the user with an automatic chip select function if selected by the user. If the user does not require
some (or any) of the chip select pin options, he may program the USR4 port pins to operate in the same way as
USR3 port pins.
The USR Data Register contents determine pin values if chosen as an output. When reading from the data
register’s SFR address, the pin logic values are returned as data except when the port address is the
destination address for a read-modify-write instruction. In this case, the latched register values are returned as
data. When reading data from a data register that is mapped in the external memory space, the pin values are
always returned as data.
The USR5 Register allows for 2 additional input pins. In normal operation these pins can be used as general
purpose inputs. In power-down mode, the user can program either rising or falling transitions or logical
combinations of these pins to wake up the chip.
USR 1 PORT
USR1 DATA SFR Address 90h
Bit Addressable
Reset State 00h
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
USR1.7
USR1.6
USR1.5
USR1.4
USR1.3
USR1.2
USR1.1
USR1.0
Bits in this register will be asserted on the USR1(7:0) pins if the corresponding direction register bit is a 0.
Reading this SFR’s address will return data reflecting the values of pins USR1(7:0) except when address 90h is
the destination address for a read-modify-write instruction. In this case, the latched register values are returned
as data.
USR1 port signals are also used as timer controls. In applications where the external signals are required for
timer count modes, the corresponding port pin should be configured as an input.
USR1.0 bit
USR1.1 bit
USR1.2 bit
USR1.3 bit
=
=
=
=
TIMER0 T0 PIN
TIMER1 T1 PIN
TIMER2 T2 EX PIN
TIMER2 T2 PIN
USR1 Port Direction (DIR1) SFR Address 91h
Byte Addressable
Reset State FFh
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
DIR1.7
DIR1.6
DIR1.5
DIR1.4
DIR1.3
DIR1.2
DIR1.1
DIR1.0
This register is used to designate the USR1 pins as either inputs or outputs. If the register bit is reset to a 0, the
corresponding USR1 pin is programmed as an output that will be driven by the corresponding USR1 data
register bit. If the register bit is a 1, the corresponding pin will be treated as an input.
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