參數(shù)資料
型號: 71M6541D-IGTR/F
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類: 模擬信號調(diào)理
英文描述: SPECIALTY ANALOG CIRCUIT, PQFP64
封裝: LEAD FREE, LQFP-64
文件頁數(shù): 82/165頁
文件大?。?/td> 2208K
代理商: 71M6541D-IGTR/F
v1.1
2008–2011 Teridian Semiconductor Corporation
23
111
Reserved
Notes:
1.
Only two codes of RCMD[4:2] (SFR 0xFC[4:2]) are relevant for normal
operation. These are RCMD[4:2] = 001 and 010. Codes 000 and 101
are invalid and will be ignored if used. The remaining codes are
reserved and must not be used.
2.
For the RCMD[1:0] control field, codes 01, 10 and 11 are valid and 00
is invalid and must not be used.
Table 6 shows the allowable combinations of values in RCMD[4:2] and TMUXRn[2:0], and the
corresponding data type and format sent back by the 71M6x01 isolated sensor and how the data is stored
in RMT_RD[15:8] and RMT_RD[7:0]. The MPU selects which of the three phases is read by asserting the
proper code in the RCMD[1:0] field, as shown in Table 5.
Table 6: Remote Interface Read Commands
RCMD[4:2]
TMUXRn[2:0]
Read Operation
RMT_RD [15:8]
RMT_RD [7:0]
001
00X
TRIMT[7:0]
(trim fuse for all 71M6x01)
TRIMT[7]=RMT_RD[8]
TRIMT[6:0]=RMT_RD[7:1]
010
00X
STEMP[10:0]
(sensed 71M6x01 temperature)
STEMP[10:8]=RMT_RD[10:8]
(RMT_RD[15:11] are sign extended)
STEMP[7:0]
010
01X
VSENSE[7:0]
(sensed 71M6x01 supply voltage)
All zeros
VSENSE[7:0]
010
10X
VERSION[7:0]
(chip version)
VERSION[7:0]
All zeros
Notes:
1.
TRIMT[7:0] is the VREF trim value for all 71M6x01 devices. Note that the TRIMT[7:0] 8-bit value is formed
by RMT_RD[8] and RMT_RD[7:1]. See the 71M6xxx Data sheet for more information on TRIMT[7:0]
2.
See the 71M6xxx Data Sheet for the equation to calculate temperature from the
STEMP[7:0] value read from
the 71M6x01.
3.
See the 71M6xxx Data Sheet for the equation to calculate temperature from the
VSENSE[7:0] value read from
the 71M6x01.
With hardware and trim-related information on each connected 71M6x01 Isolated Sensor available to the
71M6541D/F, the MPU can implement temperature compensation of the energy measurement based on the
individual temperature characteristics of the 71M6x01 Isolated Sensor. See 4.7 Metrology Temperature
Compensation on page 97 for details.
Table 7 shows all I/O RAM registers used for control of the external 71M6x01 Isolated Sensors. See the
71M6xxx Data Sheet for additional details.
Table 7: I/O RAM Control Bits for Isolated Sensor
Name
Address
RST
Default
WAKE
Default
R/W Description
RCMD[4:0]
SFR
FC[4:0]
0
R/W
When the MPU writes a non-zero value to RCMD,
the 71M654x issues a command to the cor-
responding isolated sensor selected with
RCMD[1:0]. When the command is complete, the
71M654x clears RCMD[4:2]. The command code
itself is in RCMD[4:2].
PERR_RD
PERR_WR
SFR FC[6]
SFR FC[5]
0
R/W
The 71M654x sets these bits to indicate that a
parity error on the isolated sensor has been de-
tected. Once set, the bits are remembered until
they are cleared by the MPU.
CHOPR[1:0]
2709[7:6]
00
R/W
The CHOP settings for the isolated sensors.
00 – Auto chop. Change every multiplexer frame.
01 – Positive
10 – Negative
11 – Same as 00
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