- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄68811 > 71M6533-IGTR/F (TERIDIAN SEMICONDUCTOR CORP) SPECIALTY ANALOG CIRCUIT, PQFP100 PDF資料下載
參數(shù)資料
| 型號(hào)： | 71M6533-IGTR/F |
| 廠商： | TERIDIAN SEMICONDUCTOR CORP |
| 元件分類： | 模擬信號(hào)調(diào)理 |
| 英文描述： | SPECIALTY ANALOG CIRCUIT, PQFP100 |
| 封裝： | LEAD FREE, LQFP-100 |
| 文件頁數(shù)： | 58/124頁 |
| 文件大?。?/td> | 2008K |
| 代理商： | 71M6533-IGTR/F |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁當(dāng)前第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁第117頁第118頁第119頁第120頁第121頁第122頁第123頁第124頁
FDS_6533_6534_004
71M6533/71M6534 Data Sheet
v1.1
2007-2009 TERIDIAN Semiconductor Corporation
39
terrupt, and must finish before the next one second boundary. The rate adjustment will be implemented
starting at the next one-second boundary. Since the LSB results in an adjustment every four seconds,
the frequency should be measured over an interval that is a multiple of four seconds.
To adjust the clock rate using the digital rate adjust, the appropriate values must be written to PREG[16:0]
and QREG[1:0]. The default frequency is 32,768 RTCLK cycles per second. To shift the clock frequency
by
ppm, calculate PREG and QREG using the following equation:
+
+
=
+
5
.
0
10
1
8
32768
floor
QREG
PREG
4
6
For example, for a shift of -988 ppm, 4
PREG + QREG = 262403 = 0x40103. PREG = 0x10040, and
QREG = 0x03. The default values of PREG and QREG, corresponding to zero adjustment, are 0x10000
and 0x0, respectively.
Default values for RTCA_ADJ, PREG and QREG should be nominal values, at the center of the ad-
justment range. Uncalibrated extreme values (zero, for example) can cause incorrect operation.
If the crystal temperature coefficient is known, the MPU can integrate temperature and correct the RTC
time as necessary.
The sub-second register of the RTC, SUBSEC, can be read by the MPU after the one-second interrupt and
before reaching the next one second boundary. SUBSEC contains the count remaining, in 1/256 second
nominal clock periods, until the next one-second boundary. When the RST_SUBSEC bit is written, the
SUBSEC counter is restarted. Reading and resetting the sub-second counter can be used as part of an
algorithm to accurately set the RTC.
When setting the RTC_SEC register, it is important to take into account that the associated write operation
will be performed only in the next second boundary. This means that to set the RTC_SEC register to n,
the value n+1 has to be written. Similarly, increment and decrement operations need to be adjusted, i.e.
to increment the RTC_SEC register that is at count n, the value n+2 has to be written, and to decrement
the RTC_SEC register that is at count n, the value n has to be written.
1.4.4
Temperature Sensor
The device includes an on-chip temperature sensor for determining the temperature of the bandgap re-
ference. If automatic temperature measurement is not performed by selecting CHOP_E = 00, the MPU
may request an alternate multiplexer frame containing the temperature sensor output by asserting
MUX_ALT. The primary use of the temperature data is to determine the magnitude of compensation re-
quired to offset the thermal drift in the system (see Section 3.5 Temperature Compensation).
1.4.5
Physical Memory
Flash Memory
The device includes 128 KB (71M6533/H, 71M6534) or 256 KB (71M6534H) of on-chip flash memory.
The flash memory primarily contains MPU and CE program code. It also contains images of the CE
RAM, MPU RAM and I/O RAM. On power-up, before enabling the CE, the MPU copies these images to
their respective locations.
The flash memory is segmented into individually erasable pages that contain 1024 bytes.
Flash space allocated for the CE program is limited to 4096 16-bit words (8 KB). The CE program must
begin on a 1 KB boundary of the flash address space. The CE_LCTN[7:0] word defines which 1 KB
boundary contains the CE code. Thus, the first CE instruction is located at 1024*CE_LCTN[7:0].
Flash Write Procedures
The MPU may write to the flash memory. This is one of the non-volatile storage options available to the
user in addition to external EEPROM.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 71M6534H-IGT/F | SPECIALTY ANALOG CIRCUIT, PQFP120 |
| 71M6533H-IGT/F | SPECIALTY ANALOG CIRCUIT, PQFP100 |
| 71M6533-IGT/F | SPECIALTY ANALOG CIRCUIT, PQFP100 |
| 71M6542F-IGT/F | SPECIALTY ANALOG CIRCUIT, PQFP100 |
| 71M6542G-IGTR/F | SPECIALTY ANALOG CIRCUIT, PQFP100 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 71M6534 | 制造商:TERIDIAN 制造商全稱:TERIDIAN 功能描述:Energy Meter IC |
| 71M6534H | 制造商:TERIDIAN 制造商全稱:TERIDIAN 功能描述:Energy Meter IC |
| 71M6534H-DB | 功能描述:開發(fā)板和工具包 - 8051 71M6534H Demo Brd RoHS:否 制造商:Silicon Labs 產(chǎn)品:Development Kits 工具用于評(píng)估:C8051F960, Si7005 核心: 接口類型:USB 工作電源電壓: |
| 71M6534H-IGT/F | 功能描述:計(jì)量片上系統(tǒng) - SoC Precision Energy Meter IC RoHS:否 制造商:Maxim Integrated 核心:80515 MPU 處理器系列:71M6511 類型:Metering SoC 最大時(shí)鐘頻率:70 Hz 程序存儲(chǔ)器大小:64 KB 數(shù)據(jù) RAM 大小:7 KB 接口類型:UART 可編程輸入/輸出端數(shù)量:12 片上 ADC: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:LQFP-64 封裝:Reel |
| 71M6534H-IGTR/F | 功能描述:計(jì)量片上系統(tǒng) - SoC Precision Energy Meter IC RoHS:否 制造商:Maxim Integrated 核心:80515 MPU 處理器系列:71M6511 類型:Metering SoC 最大時(shí)鐘頻率:70 Hz 程序存儲(chǔ)器大小:64 KB 數(shù)據(jù) RAM 大小:7 KB 接口類型:UART 可編程輸入/輸出端數(shù)量:12 片上 ADC: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:LQFP-64 封裝:Reel |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。