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| 型號(hào)： | 71M6531D-IM/F |
| 廠商： | TERIDIAN SEMICONDUCTOR CORP |
| 元件分類： | 電源管理 |
| 英文描述： | 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, QCC68 |
| 封裝： | LEAD FREE, QFN-68 |
| 文件頁(yè)數(shù)： | 26/120頁(yè) |
| 文件大小： | 2477K |
| 代理商： | 71M6531D-IM/F |
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FDS 6531/6532 005
Data Sheet 71M6531D/F-71M6532D/F
v1.3
2005-2010 TERIDIAN Semiconductor Corporation
13
Figure 3: General Topology of a Chopped Amplifier
It is assumed that an offset voltage Voff appears at the positive amplifier input. With all switches, as
controlled by CROSS, in the A position, the output voltage is:
Voutp – Voutn = G (Vinp + Voff – Vinn) = G (Vinp – Vinn) + G Voff
With all switches set to the B position by applying the inverted CROSS signal, the output voltage is:
Voutn – Voutp = G (Vinn – Vinp + Voff) = G (Vinn – Vinp) + G Voff, or
Voutp – Voutn = G (Vinp – Vinn) - G Voff
Thus, when CROSS is toggled, e.g. after each multiplexer cycle, the offset will alternately appear on the
output as positive and negative, which results in the offset effectively being eliminated, regardless of its
polarity or magnitude.
When CROSS is high, the connection of the amplifier input devices is reversed. This preserves the overall
polarity of that amplifier gain; it inverts its input offset. By alternately reversing the connection, the
amplifier’s offset is averaged to zero. This removes the most significant long-term drift mechanism in the
voltage reference. The CHOP_E[1:0] field controls the behavior of CROSS. The CROSS signal will reverse
the amplifier connection in the voltage reference in order to negate the effects of its offset. On the first
CK32 rising edge after the last multiplexer state of its sequence, the multiplexer will wait one additional
CK32 cycle before beginning a new frame. At the beginning of this cycle, the value of CROSS will be
updated according to the CHOP_E[1:0] field. The extra CK32 cycle allows time for the chopped VREF to
settle. During this cycle, MUXSYNC is held high. The leading edge of MUXSYNC initiates a pass
through the CE program sequence. The beginning of the sequence is the serial readout of the four RTM
words.
CHOP_E[1:0] has four states: positive, reverse and two toggle states. In the positive state, CHOP_E[1:0]
= 01, CROSS and CHOP_CLK are held low. In the reverse state, CHOP_E[1:0] = 10, CROSS and
CHOP_CLK are held high. In the first toggle state, CHOP_E[1:0] = 00, CROSS is automatically toggled
near the end of each multiplexer frame and an ALT frame is forced during the last multiplexer frame in each
SUM cycle. It is desirable that CROSS take on alternate values during each ALT frame. For this reason,
if CHOP_E[1:0] = 00, CROSS will not toggle at the end of the multiplexer frame immediately preceding
the ALT frame in each accumulation interval.
Figure 4: CROSS Signal with CHOP_E[1:0] = 00
Figure 4 shows CROSS over two accumulation interval when CHOP_E[1:0] = 00: At the end of the first
interval, CROSS is low, at the end of the second interval, CROSS is high. The offset error for the two
temperature measurements taken during the ALT multiplexer frames will be averaged to zero. Note that
G
-
+
V
inp
V
outp
V
outn
V
inn
CROSS
A
B
A
B
A
B
A
B
Multiplexer frames
Accumulation interval n
Accumulation interval n+1
2
4
3
2519 2520
1
2
4
3
2519 2520
1
Alternative MUX cycle
Multiplexer frames
Alternative MUX cycle
CROSS
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| 71M6531D-IMR/F | 功能描述:計(jì)量片上系統(tǒng) - SoC Residential Energy Meter IC RoHS:否 制造商:Maxim Integrated 核心:80515 MPU 處理器系列:71M6511 類型:Metering SoC 最大時(shí)鐘頻率:70 Hz 程序存儲(chǔ)器大小:64 KB 數(shù)據(jù) RAM 大小:7 KB 接口類型:UART 可編程輸入/輸出端數(shù)量:12 片上 ADC: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:LQFP-64 封裝:Reel |
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