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參數(shù)資料
| 型號： | 71M6521FE-IMR/F |
| 廠商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分類： | 模擬信號調(diào)理 |
| 英文描述： | SPECIALTY ANALOG CIRCUIT, QCC68 |
| 封裝： | LEAD FREE, LQFN-68 |
| 文件頁數(shù)： | 33/103頁 |
| 文件大?。?/td> | 1691K |
| 代理商： | 71M6521FE-IMR/F |
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71M6521DE/71M6521FE
Energy Meter IC
DATA SHEET
OCTOBER 2010
v1.1
2005-2010 Teridian Semiconductor Corporation
Page: 35 of 103
A Maxim Integrated Products Brand
19-5370; 10/10
Interrupt Priority Level Structure
All interrupt sources are combined in groups, as shown in Table 48:
Group
0
External interrupt 0
Serial channel 1 interrupt
1
Timer 0 interrupt
-
External interrupt 2
2
External interrupt 1
-
External interrupt 3
3
Timer 1 interrupt
-
External interrupt 4
4
Serial channel 0 interrupt
-
External interrupt 5
5
-
External interrupt 6
Table 48: Priority Level Groups
Each group of interrupt sources can be programmed individually to one of four priority levels by setting or clearing one bit in the
special function register IP0 and one in IP1. If requests of the same priority level are received simultaneously, an internal
polling sequence as per Table 52 determines which request is serviced first.
An overview of the interrupt structure is given in Figure 6.
IEN enable bits must be set to permit any of these interrupts to occur. Likewise, each interrupt has its own flag bit that is set by
the interrupt hardware and is reset automatically by the MPU interrupt handler (0 through 5). XFER_BUSY and RTC_1SEC,
which are OR-ed together, have their own enable and flag bits in addition to the interrupt 6 enable and flag bits (see Table 47)
and these interrupts must be cleared by the MPU software.
Interrupt Priority 0 Register (IP0)
MSB
LSB
--
WDTS
IP0.5
IP0.4
IP0.3
IP0.2
IP0.1
IP0.0
Table 49: The IP0 Register
Note: WDTS is not used for interrupt controls
Interrupt Priority 1 Register (IP1)
MSB
LSB
-
IP1.5
IP1.4
IP1.3
IP1.2
IP1.1
IP1.0
Table 50: The IP1 Register:
IP1.x
IP0.x
Priority Level
0
Level0 (lowest)
0
1
Level1
1
0
Level2
1
Level3 (highest)
Table 51: Priority Levels
相關(guān)PDF資料 |
PDF描述 |
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| 71M6521DE-IGT/F | SPECIALTY ANALOG CIRCUIT, QFP64 |
| 71M6521FE-IGTR/F | SPECIALTY ANALOG CIRCUIT, QFP64 |
| 71M6521DE-IMR/F | SPECIALTY ANALOG CIRCUIT, QCC68 |
| 71M6521FE-IM/F | SPECIALTY ANALOG CIRCUIT, QCC68 |
| 71M6521FE-IGT/F | SPECIALTY ANALOG CIRCUIT, QFP64 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 71M6521-TGP1-68M | 制造商:Maxim Integrated Products 功能描述:Programmer Accessories Gang Programmer Base w/6521 Socket Brd |
| 71M6523-DB | 功能描述:開發(fā)板和工具包 - 8051 71M6521D Demo Brd RoHS:否 制造商:Silicon Labs 產(chǎn)品:Development Kits 工具用于評估:C8051F960, Si7005 核心: 接口類型:USB 工作電源電壓: |
| 71M6523-IM | 功能描述:計量片上系統(tǒng) - SoC Residential Energy Meter IC RoHS:否 制造商:Maxim Integrated 核心:80515 MPU 處理器系列:71M6511 類型:Metering SoC 最大時鐘頻率:70 Hz 程序存儲器大小:64 KB 數(shù)據(jù) RAM 大小:7 KB 接口類型:UART 可編程輸入/輸出端數(shù)量:12 片上 ADC: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:LQFP-64 封裝:Reel |
| 71M6523-IM/F | 功能描述:計量片上系統(tǒng) - SoC Residential Energy Meter IC RoHS:否 制造商:Maxim Integrated 核心:80515 MPU 處理器系列:71M6511 類型:Metering SoC 最大時鐘頻率:70 Hz 程序存儲器大小:64 KB 數(shù)據(jù) RAM 大小:7 KB 接口類型:UART 可編程輸入/輸出端數(shù)量:12 片上 ADC: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:LQFP-64 封裝:Reel |
| 71M6523-IMR | 功能描述:計量片上系統(tǒng) - SoC Residential Energy Meter IC RoHS:否 制造商:Maxim Integrated 核心:80515 MPU 處理器系列:71M6511 類型:Metering SoC 最大時鐘頻率:70 Hz 程序存儲器大小:64 KB 數(shù)據(jù) RAM 大小:7 KB 接口類型:UART 可編程輸入/輸出端數(shù)量:12 片上 ADC: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:LQFP-64 封裝:Reel |
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