參數(shù)資料
型號: 71M6513H-IGTR/F
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類: 模擬信號調(diào)理
英文描述: SPECIALTY ANALOG CIRCUIT, PQFP100
封裝: LEAD FREE, LQFP-100
文件頁數(shù): 9/104頁
文件大?。?/td> 1390K
代理商: 71M6513H-IGTR/F
71M6513/71M6513H
3-Phase Energy Meter IC
DATA SHEET
AUGUST 2011
Page: 12 of 104
2005-2011 Teridian Semiconductor Corporation
A Maxim Integrated Products Brand
Computation Engine (CE)
The CE, a dedicated 32-bit RISC processor, performs the precision computations necessary to accurately measure energy.
The CE calculations and processes include:
Multiplication of each current sample with its associated voltage sample to obtain the energy per sample (when
multiplied with the constant sample time).
Frequency-insensitive delay cancellation on all six channels (to compensate for the delay between samples caused
by the multiplexing scheme).
90
° phase shifter (for VAR calculations).
Pulse generation.
Monitoring of the input signal frequency (for frequency and phase information).
Monitoring of the input signal amplitude (for sag detection).
Scaling of the processed samples based on chip temperature (temperature compensation) and calibration
coefficients.
The CE program RAM (CE PRAM) is loaded at boot time by the MPU and then executed by the CE. Each CE instruction word
is 2 bytes long. The CE program counter begins a pass through the CE code each time multiplexer state 0 begins. The code
pass ends when a HALT instruction is executed. For proper operation, the code pass must be completed before the
multiplexer cycle ends (see System Timing Summary in the Functional Description Section).
The CE data RAM (CE DRAM) can be accessed by the FIR filter block, the RTM circuit, the CE, and the MPU. Assigned time
slots are reserved for FIR, RTM, and MPU, respectively, such that memory accesses to CE_RAM do not collide. Holding re-
gisters are used to convert 8-bit wide MPU data to/from 32-bit wide CE DRAM data, and wait states are inserted as needed,
depending on the frequency of CKMPU.
Table 2 shows the CE DRAM addresses allocated to analog inputs from the AFE.
Address
Name
Zero
Reference
Description
0x00
IA
V3P3
Phase A current
0x01
VA
V3P3
Phase A voltage
0x02
IB
V3P3
Phase B current
0x03
VB
V3P3
Phase B voltage
0x04
IC
V3P3
Phase C current
0x05
VC
V3P3
Phase C voltage
0x06
TEMP
VBIAS
Temperature
0x07
V3
VBIAS
V3 monitor
Table 2: CE DRAM Locations for ADC Results
Meter Equations
The Compute Engine (CE) program for industrial meter configurations implements the equations in Table 3. The I/O RAM
register EQU specifies the equation to be used based on the number and arrangement of phases used for metering. In case of
single and two-phase metering, the unconnected inputs should be tied to V3P3A, the analog supply voltage. The EQU
selection enables the 71M6513 to calculate polyphase power measurement based on the type of service used. Table 3 also
states the sequence of the multiplexer in the AFE.
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