參數(shù)資料
型號： 71M6513H-IGTR/F
廠商： MAXIM INTEGRATED PRODUCTS INC
元件分類： 模擬信號調(diào)理
英文描述： SPECIALTY ANALOG CIRCUIT, PQFP100
封裝： LEAD FREE, LQFP-100
文件頁數(shù)： 51/104頁
文件大?。?/td> 1390K
代理商： 71M6513H-IGTR/F
71M6513/71M6513H
3-Phase Energy Meter IC
DATA SHEET
AUGUST 2011
Page: 50 of 104
2005-2011 Teridian Semiconductor Corporation
A Maxim Integrated Products Brand
System Timing Summary
Figure 13 summarizes the timing relationships between the input MUX states, the CE_BUSY signal, and the two serial output
streams. In this example, MUX_DIV=0 (six mux states) and FIR_LEN = 0 (2 CK32 cycles). Since FIR filter conversions require
two or three CK32 cycles, the duration of each MUX cycle is 1 + 2 * states defined by MUX_DIV if FIR_LEN = 0, and 1 + 3 *
states defined by MUX_DIV if FIR_LEN = 1. Followed by the conversions is a single CK32 cycle.
Each CE program pass begins when MUX_SYNC falls. Depending on the length of the CE program, it may continue running
until the end of the ADC5 conversion. CE opcodes are constructed to ensure that all CE code passes consume exactly the
same number of cycles. The result of each ADC conversion is inserted into the CE DRAM when the conversion is complete.
The CE code is designed to tolerate sudden changes in ADC data. The exact CK count when each ADC value is loaded into
DRAM is shown in Figure 13.
Figure 13 also shows that the two serial data streams, RTM and SSI, begin transmitting at the beginning of MUX_SYNC. RTM,
consisting of 140 CK cycles, will always finish before the next code pass starts. The SSI port begins transmitting at the same
time as RTM, but may significantly overrun the next code pass if a large block of data is required. Neither the CE nor the SSI
port will be affected by this overlap.
CK32
MUX STATE
0
1
2
3
4
5
MUX_DIV Conversions (MUX_DIV=6 is shown)
Settle
ADC MUX Frame
ADC EXECUTION
S
MUX_SYNC
S
CE_EXECUTION
RTM
140
SSI
MAX CK COUNT
BEGIN SSI TRANSFER
LAST SSI TRANSFER
0
300
150
600
900
1200
1500
1800
ADC0
ADC1
ADC2
ADC3
ADC4
ADC5
CK COUNT = CE_CYCLES + floor(CE_CYCLES + 2) / 5)
NOTES:
1. ALL DIMENSIONS ARE 5MHZ CK COUNTS.
2. THE PRECISE FREQUENCY OF CK IS 150*CRYSTAL FREQUENCY = 4.9152MHz.
3. XFER_BUSY OCCURS ONCE EVERY (PRESAMPS * SUM_CYCLES) CODE PASSES.
CE_BUSY
XFER_BUSY
INITIATED BY A CE OPCODE AT END OF SUM INTERVAL
ADC TIMING
CE TIMING
RTM and SSI TIMING
Figure 13: Timing Relationship between ADC MUX, CE, and Serial Transfers
Figure 14, Figure 15, and Figure 16 show the RTM and SSI timing, respectively.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
71M6513-IEL 制造商:未知廠家 制造商全稱:未知廠家 功能描述:71M6513
71M6513-IEL/F 功能描述:計(jì)量片上系統(tǒng) - SoC 3-Phase Energy Meter I/C RoHS:否 制造商:Maxim Integrated 核心:80515 MPU 處理器系列:71M6511 類型:Metering SoC 最大時(shí)鐘頻率:70 Hz 程序存儲(chǔ)器大小:64 KB 數(shù)據(jù) RAM 大小:7 KB 接口類型:UART 可編程輸入/輸出端數(shù)量:12 片上 ADC: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:LQFP-64 封裝:Reel
71M6513-IELR/F 制造商:Maxim Integrated Products 功能描述:Metering Systems on a Chip - SoC 3-Phase Energy Meter I/C
71M6513-IGT/F 功能描述:計(jì)量片上系統(tǒng) - SoC 3-Phase Energy Meter I/C RoHS:否 制造商:Maxim Integrated 核心:80515 MPU 處理器系列:71M6511 類型:Metering SoC 最大時(shí)鐘頻率:70 Hz 程序存儲(chǔ)器大小:64 KB 數(shù)據(jù) RAM 大小:7 KB 接口類型:UART 可編程輸入/輸出端數(shù)量:12 片上 ADC: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:LQFP-64 封裝:Reel
71M6513-IGT/F1 功能描述:計(jì)量片上系統(tǒng) - SoC RoHS:否 制造商:Maxim Integrated 核心:80515 MPU 處理器系列:71M6511 類型:Metering SoC 最大時(shí)鐘頻率:70 Hz 程序存儲(chǔ)器大小:64 KB 數(shù)據(jù) RAM 大小:7 KB 接口類型:UART 可編程輸入/輸出端數(shù)量:12 片上 ADC: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:LQFP-64 封裝:Reel
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