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參數(shù)資料
| 型號(hào)： | 7052S25G |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類(lèi)： | SRAM |
| 英文描述： | 2K X 8 FOUR-PORT SRAM, 25 ns, CPGA108 |
| 封裝： | 1.210 X 1.210 INCH, 0.160 INCH HEIGHT, PGA-108 |
| 文件頁(yè)數(shù)： | 4/11頁(yè) |
| 文件大小： | 123K |
| 代理商： | 7052S25G |
6.42
IDT7052S/L
High-Speed 2K x 8 FourPort Static RAM
Military, Industrial and Commercial Temperature Ranges
2
NOTES:
1. All VCC pins must be connected to the power supply.
2. All GND pins must be connected to the ground supply.
3. Package body is approximately 1.21 in x 1.21 in x .16 in.
4. This package code is used to reference the package diagram.
5. This text does not indicate orientation of the actual part-marking.
Pin Configurations(1,2,3)
2674 drw 02
OE
P2
A7
P2
A8
P2
A5
P2
80
I/O2
P1
I/O3
P1
I/O6
P1
VCC
GND
I/O2
P4
I/O5
P4
A3
P2
A4
P2
A5
P3
A7
P3
A8
P3
OE
P3
A0
P2
A1
P3
A1
P2
A0
P3
77
74
72
69
68
65
63
60
A3
P3
A4
P3
83
78
76
73
70
67
64
61
59
84
56
86
87
88
90
91
92
94
95
97
96
100
99
103
101
105
104
2
1
5
4
7
8
10
12
13
16
21
19
25
22
28
24
32
31
34
35
37
39
40
44
43
48
46
52
49
55
51
IDT7052G
G108-1(4)
108-Pin PGA
Top View(5)
AB
C
D
E
F
G
H
J
K
L
M
81
57
54
53
82
79
75
71
66
62
58
50
R/
W
P2
NC
R/
W
P3
BUSY
P2
BUSY
P3
A6
P2
CE
P3
A2
P3
A2
P2
A6
P3
A2
P4
A1
P4
A9
P3
A9
P2
CE
A1
P1
A2
P1
33
36
38
41
42
45
47
3
6
9
111415182023
29
30
26
27
85
89
93
98
102
106
107
108
NC
P1
GND
A5
P1
A3
P1
A0
P1
A6
P1
A4
P1
VCC
CE
P1
OE
P1
I/O0
P1
A8
P1
A9
P1
A7
P1
R/
W
P1
BUSY
1
P1
VCC
GND
I/O6
P4
I/O4
P1
I/O7
P1
I/O0
P2
I/O2
P2
I/O4
P2
I/O6
P2
I/O1
P3
I/O3
P3
I/O5
P3
I/O7
P3
I/O3
P4
I/O4
P4
I/O5
P1
NC
I/O1
P2
I/O3
P2
I/O5
P2
I/O7
P2
I/O0
P3
I/O2
P3
I/O4
P3
I/O6
P3
I/O0
P4
I/O1
P4
A0
P4
A3
P4
A5
P4
A4
P4
A6
P4
GND
P4
A7
P4
A8
P4
NC
P4
A9
P4
OE
P4
R/
W
GND
P4
I/O7
P4
BUSY
GND
CE
12
11
10
09
08
07
06
05
04
03
02
01
A10
P1
A10
P2
A10
P3
A10
P4
INDEX
11/07/01
hardware port arbitration is not needed. This part lends itself to those
systems which cannot tolerate wait states or are designed to be able to
externallyarbitrateorwithstandcontentionwhenallportssimultaneously
access the same FourPort RAM location.
The IDT7052 provides four independent ports with separate control,
address, and I/O pins that permit independent, asynchronous access for
reads or writes to any location in memory. It is the user’s responsibility to
ensure data integrity when simultaneously accessing the same memory
locationfromallports.Anautomaticpowerdownfeature,controlledby
CE,
permitstheon-chipcircuitryofeachporttoenteraverylowpowerstandby
power mode.
Fabricated using IDT’s CMOS high-performance technology, this
FourPort SRAM typically operates on only 750mW of power. Low-power
(L) versions offer battery backup data retention capability, with each port
typically consuming 50W from a 2V battery.
The IDT7052 is packaged in a ceramic 108-pin Pin Grid Array (PGA),
120-pin Thin Quad Flatpack (TQFP) and 132-pin Plastic Quad Flatpack
(PQF).Militarygradeproductismanufacturedincompliancewiththelatest
revision of MIL-PRF-38535 QML, making it ideally suited to military
temperatureapplicationsdemandingthehighestlevelofperformanceand
reliability.
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