Advance Information
MC68HC908MR16/MC68HC908MR32
—
Rev. 5.0
276
Serial Peripheral Interface Module (SPI)
MOTOROLA
Serial Peripheral Interface Module (SPI)
For an idle master of idle slave that has no data loaded into its
transmit buffer, the SPTE will be set again within two bus cycles since
the transmit buffer empties into the shift register. This allows the user
to queue up a 16-bit value to send. For an already active slave, the
load of the shift register cannot occur until the transmission is
completed. This implies that a back-to-back write to the transmit data
register is not possible. The SPTE indicates when the next write can
occur.
Reset sets the SPTE bit.
1 = Transmit data register empty
0 = Transmit data register not empty
MODFEN
—
Mode Fault Enable Bit
This read/write bit, when set to 1, allows the MODF flag to be set. If
the MODF flag is set, clearing the MODFEN does not clear the MODF
flag. If the SPI is enabled as a master and the MODFEN bit is low,
then the SS pin is available as a general-purpose I/O.
If the MODFEN bit is set, then this pin is not available as a
general-purpose I/O. When the SPI is enabled as a slave, the SS pin
is not available as a general-purpose I/O regardless of the value of
MODFEN. See
13.12.4 SS (Slave Select)
.
If the MODFEN bit is low, the level of the SS pin does not affect the
operation of an enabled SPI configured as a master. For an enabled
SPI configured as a slave, having MODFEN low only prevents the
MODF flag from being set. It does not affect any other part of SPI
operation. See
13.7.2 Mode Fault Error
.
SPR1 and SPR0
—
SPI
Baud Rate Select Bits
In master mode, these read/write bits select one of four baud rates as
shown in
Table 13-4
. SPR1 and SPR0 have no effect in slave mode.
Reset clears SPR1 and SPR0.
Table 13-4. SPI Master Baud Rate Selection
SPR1:SPR0
Baud Rate Divisor (BD)
00
2
01
8
10
32
11
128