- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄67346 > 5962R1023701QXC 16-CHANNEL, SGL ENDED MULTIPLEXER, CDFP28 PDF資料下載
參數(shù)資料
| 型號： | 5962R1023701QXC |
| 元件分類： | 多路復(fù)用及模擬開關(guān) |
| 英文描述： | 16-CHANNEL, SGL ENDED MULTIPLEXER, CDFP28 |
| 封裝： | CERAMIC, FLATPACK-28 |
| 文件頁數(shù)： | 5/21頁 |
| 文件大?。?/td> | 326K |
| 代理商： | 5962R1023701QXC |
13
Timing Diagrams
Multiplexer Asynchronous Parallel Timing (UT16MX116)
Am Valid
CS
A[3:0]
S[x] = Analog Inputs
COM
(Previous)
COM = S[Am Valid]
COM = S[An Valid]
tAS1
VDD_IO
50%
GND
VDD_IO
50%
GND
tAS2
ApValid
COM = S[Ap Valid]
tAS1
HiZ
tMUX
tBBM
HiZ
tCYCLE
tPROP_D
AnValid
Note:
1. CS may be held in a continuous low state, holding CS high provides protection for false address change.
2. tCYCLE is the minimum cycle time between the falling edges of CS and/or any address changes. If tCYCLE is shorter than tPROP_D, an
addressing error may occur.
3. All bits (A[3:0]) of any address change should be received by the UT16MX116 within 18ns of the first bit change for proper operation.
tMUX
tBBM
tPROP_D
tMUX
tBBM
tPROP_D
Figure 4. UT16MX116 Timing Diagram
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 5962F1023703QXC | 16-CHANNEL, SGL ENDED MULTIPLEXER, CDFP28 |
| 5962F1023702QXC | 16-CHANNEL, SGL ENDED MULTIPLEXER, CDFP28 |
| 5962F1023703VXC | 16-CHANNEL, SGL ENDED MULTIPLEXER, CDFP28 |
| 5962F1023701VXC | 16-CHANNEL, SGL ENDED MULTIPLEXER, CDFP28 |
| 5962R1023702QXC | 16-CHANNEL, SGL ENDED MULTIPLEXER, CDFP28 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 5962R1120301VXA | |
| 5962R1122201VZA | 制造商:Texas Instruments 功能描述:OP Amp Single GP ±18V 10-Pin CLGA Tray 制造商:Texas Instruments 功能描述:LOW OFFSET, LOW DRIFT JFET INPUT OPERATI - Rail/Tube |
| 5962R1123901VHA | |
| 5962R1223301VXA | |
| 5962R1320501VXA |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。