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參數(shù)資料
| 型號： | 5962F9855201QZA |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, 12 MHz, RISC MICROCONTROLLER, CQFP132 |
| 封裝： | QFP-132 |
| 文件頁數(shù)： | 22/64頁 |
| 文件大小： | 1464K |
| 代理商： | 5962F9855201QZA |
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29
access the monitor program. An example of this technique is
accessing the monitor on a specific condition. A specific
interrupt event (e.g., memory access location 100) can generate
a hardware interrupt to the PFAIL input. Accessing the monitor
allows the software programmer to evaluate the state of the
UT69R000 and system (i.e., memory or I/O subsystem).
7.1 Using The Monitor
When the UT69R000 enters the Monitor mode, it begins
executing the monitor program stored in the instruction port.
The UT69R000 initially sets its internal UART as the default
monitor interface.
To control the UT69R000 with the Monitor, the user simply
transmits a predefined set of ASCII characters over the serial
data port. The list of the predefined ASCII characters
meaningful to the UT69R000’s Monitor mode are described in
detail in the following sections. The UT69R000 can receive
these Monitor control commands with its internal UART,
decode them, and then take the appropriate action. All ASCII
characters must be capitalized for the UT69R000 to
recognize them.
The four primary ASCII control characters are E, M, C, and R.
These control characters permit the system user to Examine or
Modify instruction memory, Operand memory, external I/O,
and internal registers, Continue Execution, and Run From a set
starting location.
OSCIN
CK1
CK2
CK3
CK4
EXECUTE
(NOP)
PIR OPEN
PIR CLOSE
EXECUTE
INTERRUPT SERVICE
COMMANDS
PRIMARY INSTRUCTION REGISTER
(PIR)
FETCH
(NOP)
STATE
RA(19:0)
RD(15:0)
INT
INTERRUPT
ADDRESS VALID
INTERRUPT
INSTRUCTION VALID
Figure 24. Interrupt Timing
Assumes:
1. Interrupts enabled at time zero.
2. No mask bits set at time zero.
Do not care field
#
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