參數(shù)資料
型號: 5962-89571022A
元件分類: 光電耦合器
英文描述: 2 CHANNEL LOGIC OUTPUT OPTOCOUPLER, 40 Mbps
封裝: CERAMIC, LCCC-20
文件頁數(shù): 5/12頁
文件大?。?/td> 144K
代理商: 5962-89571022A
2
Selection Guide–Package Styles and Lead Configuration Options
Package
8 Pin DIP
20 Pad LCCC
Lead Style
Through Hole
Surface Mount
Channels
1
2
Common Channel Wiring
None
VCC, GND
None
Avago Part # & Options
Commercial
HCPL-5400
HCPL-5430
HCPL-6430
MIL-PRF-38534, Class H
HCPL-5401
HCPL-5431
HCPL-6431
MIL-PRF-38534, Class K
HCPL-540K
HCPL-543K
HCPL-643K
Standard Lead Finish
Gold Plate
Solder Pads*
Solder Dipped*
Option 200
Butt Cut/Gold Plate
Option 100
Gull Wing/Soldered*
Option 300
Class H SMD Part #
Prescript for all below
5962-
Either Gold or Solder
8957001PX
8957101PX
89571022X
Gold Plate
8957001PC
8957101PC
Solder Dipped*
8957001PA
8957101PA
89571022A
Butt Cut/Gold Plate
8957001YC
8957101YC
Butt Cut/Soldered*
8957001YA
8957101YA
Gull Wing/Soldered*
8957001XA
8957101XA
Class K SMD Part #
Prescript for all below
5962-
Either Gold of Solder
8957002KPX
8957103KPX
8957104K2X
Gold Plate
8957002KPC
8957103KPC
Solder Dipped*
8957002KPA
8957103KPA
8957104K2A
Butt Cut/Gold Plate
8957002KYC
8957103KYC
Butt Cut/Soldered*
8957002KYA
8957103KYA
Gull Wing/Soldered*
8957002KXA
8957103KXA
*Solder contains lead.
DIP through hole (case outlines P), and leadless ceramic
chip carrier (case outline 2). Devices may be purchased
with a variety of lead bend and plating options. See
Selection Guide Table for details. Standard Microcircuit
Drawing (SMD) parts are available for each package and
lead style.
Because the same electrical die (emitters and detectors)
are used for each channel of each device listed in this
data sheet, absolute maximum ratings, recommended
operating conditions, electrical specifications, and
performance characteristics shown in the figures are
similar for all parts. Occasional exceptions exist due to
package variations and limitations and are as noted.
Additionally, the same package assembly processes and
materials are used in all devices. These similarities give
justification for the use of data obtained from one part
to represent other part’s performance for die related
reliability and certain limited radiation test results.
data rate capability. The detector has a threshold with
hysteresis, which typically provides 0.25 mA of differen-
tial mode noise immunity and minimizes the potential
for output signal chatter. The detector in the single
channel units has a three state output stage which
eliminates the need for a pull-up resistor and allows for
direct drive of a data bus.
All units are compatible with TTL, STTL, LSTTL, and
HCMOS logic families. The 35 ns pulse width distortion
specification guarantees a 10 MBd signaling rate at
+125
°C with 35% pulse width distortion. Figures 13
through 16 show recommended circuits for reducing
pulse width distortion and optimizing the signal rate of
the product. Package styles for these parts are 8 pin
Each channel contains an AlGaAs light emitting diode
which is optically coupled to an integrated high gain
photon detector. This combination results in very high
相關PDF資料
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5962-8959827MXC 128K X 8 STANDARD SRAM, 45 ns, CDIP32
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