參數(shù)資料
型號(hào): 5962-89571022A
元件分類: 光電耦合器
英文描述: 2 CHANNEL LOGIC OUTPUT OPTOCOUPLER, 40 Mbps
封裝: CERAMIC, LCCC-20
文件頁(yè)數(shù): 3/12頁(yè)
文件大?。?/td> 144K
代理商: 5962-89571022A
11
MIL-PRF-38534 Class H, Class K, and
DSCC SMD Test Program
Avago Technologies’ Hi-Rel Optocouplers are in
compliance with MIL-PRF-38534 Classes H and K. Class
H and Class K devices are also in compliance with DSCC
drawings 5962-89570, and 5962-89571.
Testing consists of 100% screening and quality
conformance inspection to MIL-PRF-38534.
Data Rate and Pulse-Width Distortion Definitions
Propagation delay is a figure of merit which describes
the finite amount of time required for a system to
translate information from input to output when shifting
logic levels. Propagation delay from low to high (tPLH)
specifies the amount of time required for a system’s
output to change from a Logic 0 to a Logic 1, when
given a stimulus at the input. Propagation delay from
high to low (tPHL) specifies the amount of time required
for a system’s output to change from a Logic 1 to a
Logic 0, when given a stimulus at the input (see
Figure 5).
When tPLH and tPHL differ in value, pulse width distortion
results. Pulse width distortion is defined as |tPHL -tPLH|
and determines the maximum data rate capability of a
distortion-limited system. Maximum pulse width
distortion on the order of 25-35% is typically used when
specifying the maximum data rate capabilities of
systems. The exact figure depends on the particular
application (RS-232, PCM, T-1, etc.).
These high performance optocouplers offer the
advantages of specified propagation delay (tPLH, tPHL),
and pulse width distortion (|tPLH -t PHL|) over temperature
and power supply voltage ranges.
Figure 13. Recommended HCPL-5400 interface circuit
GND
VCC
HCPL-5400
226
VCC1 = +5 V
TTL
LSTTL
STTL
HCMOS
TOTEM
POLE
OUTPUT GATE
(e.g. 54AS1000)
DATA
OUT
2
DATA
IN
1
GND 2
Y
0.1 F
274
30 pF
A
GND 1
Y = A
VCC2 = 5 V
Applications
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5962-8959827MXC 128K X 8 STANDARD SRAM, 45 ns, CDIP32
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