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參數(shù)資料
| 型號(hào)： | 5962-8768102V2A |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類(lèi)： | 穩(wěn)壓器 |
| 英文描述： | 2.2 A SWITCHING CONTROLLER, 1180 kHz SWITCHING FREQ-MAX, CQCC20 |
| 封裝： | CERAMIC, LCC-20 |
| 文件頁(yè)數(shù)： | 9/15頁(yè) |
| 文件大小： | 503K |
| 代理商： | 5962-8768102V2A |
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ABSOLUTE MAXIMUM RATINGS
www.ti.com ..................................................................................................................................................... SLUS873A – JANUARY 2009 – REVISED APRIL 2009
Terminal Functions
TERMINAL
I/O
DESCRIPTION
NAME
NO.
CLK/LEB
4
O
Output of the internal oscillator
Timing capacitor connection pin for oscillator frequency programming. The timing capacitor should be
CT
6
I
connected to the device ground using minimal trace length.
EAOUT
3
O
Output of the error amplifier for compensation
GND
10
Analog ground return pin
ILIM
9
I
Input to the current limit comparator
INV
1
I
Inverting input to the error amplifier
NI
2
I
Non-inverting input to the error amplifier
OUTA
11
O
High current totem pole output A of the on-chip drive stage.
OUTB
14
O
High current totem pole output B of the on-chip drive stage.
PGND
12
Ground return pin for the output driver stage
Non-inverting input to the PWM comparator with 1.25-V internal input offset. In voltage mode operation,
RAMP
7
I
this serves as the input voltage feed-forward function by using the CT ramp. In peak current mode
operation, this serves as the slope compensation input.
RT
5
I
Timing resistor connection pin for oscillator frequency programming
SS
8
I
Soft-start input pin which also doubles as the maximum duty cycle clamp.
Power supply pin for the output stage. This pin should be bypassed with a 0.1-
F monolithic ceramic
VC
13
low ESL capacitor with minimal trace lengths.
Power supply pin for the device. This pin should be bypassed with a 0.1-
F monolithic ceramic low ESL
VCC
15
capacitor with minimal trace lengths
5.1-V reference. For stability, the reference should be bypassed with a 0.1-
F monolithic ceramic low
VREF
16
O
ESL capacitor and minimal trace length to the ground plane.
over operating free-air temperature range unless otherwise noted
(1)
VALUE
UNIT
VIN
Supply voltage,
VC, VCC
22
V
IO
Source or sink current,DC
OUTA, OUTB
0.5
A
IO
Source or sink current, pulse (0.5
s)
OUTA, OUTB
2.2
A
INV, NI, RAMP
–0.3 to 7
V
Analog inputs
ILIM, SS
–0.3 to 6
V
Power ground
PGND
±0.2
V
Outputs
OUTA, OUTB
PGND - 0.3 to VC + 0.3
V
ICLK
Clock output current
CLK/LEB
–5
mA
IO(EA) Error amplifier output current
EAOUT
5
mA
ISS
Soft-start sink current
SS
20
mA
IOSC
Oscillator charging current
RT
–5
mA
TJ
Operating virtual junction temperature range
–55 to 150
°C
TSTG Storage temperature
–65 to 150
°C
Lead temperature 1,6 mm (1/16 inch) from cases for 10 seconds
300
°C
(1)
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
Copyright 2009, Texas Instruments Incorporated
3
Product Folder Link(s): UC1825A-SP
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