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參數(shù)資料
| 型號： | 5962-0720601VXC |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | ADC |
| 英文描述： | 3-CH 14-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, CQFP52 |
| 封裝： | CERAMIC, QFP-52 |
| 文件頁數(shù)： | 3/23頁 |
| 文件大小： | 432K |
| 代理商： | 5962-0720601VXC |
SNR + 10Log10
P
S
P
N
SINAD + 10Log10
P
S
P
N
) PD
THD + 10Log10
P
S
P
D
www.ti.com
SLWS194A – MAY 2008 – REVISED OCTOBER 2009
DEFINITION OF SPECIFICATIONS
Temperature Drift
Analog Bandwidth
The temperature drift coefficient (with respect to gain
The analog input frequency at which the power of the
error and offset error) specifies the change per
fundamental is reduced by 3 dB with respect to the
degree celsius of the parameter from TMIN or TMAX. It
low-frequency value
is computed as the maximum variation of that
parameter over the whole temperature range divided
Aperture Delay
by TMAX – TMIN.
The delay in time between the rising edge of the input
sampling clock and the actual time at which the
Signal-to-Noise Ratio (SNR)
sampling occurs
SNR is the ratio of the power of the fundamental (PS)
to the noise floor power (PN), excluding the power at
Aperture Uncertainty (Jitter)
dc and in the first five harmonics.
The sample-to-sample variation in aperture delay
Clock Pulse Width/Duty Cycle
The duty cycle of a clock signal is the ratio of the time
the clock signal remains at a logic high (clock pulse
SNR is given either in units of dBc (dB to carrier)
width) to the period of the clock signal. Duty cycle is
when the absolute power of the fundamental is used
typically expressed as a percentage. A perfect
as the reference, or dBFS (dB to full scale) when the
differential sine wave clock results in a 50% duty
power of the fundamental is extrapolated to the
cycle.
converter’s full-scale range.
Maximum Conversion Rate
Signal-to-Noise and Distortion (SINAD)
The maximum sampling rate at which certified
SINAD is the ratio of the power of the fundamental
operation is given. All parametric testing is performed
(PS) to the power of all the other spectral components
at this sampling rate unless otherwise noted.
including noise (PN) and distortion (PD), but excluding
dc.
Minimum Conversion Rate
The minimum sampling rate at which the ADC
functions
Differential Nonlinearity (DNL)
SINAD is given either in units of dBc (dB to carrier)
An ideal ADC exhibits code transitions at analog input
when the absolute power of the fundamental is used
values spaced exactly 1 LSB apart. DNL is the
as the reference, or dBFS (dB to Full Scale) when the
deviation of any single step from this ideal value,
power of the fundamental is extrapolated to the
measured in units of LSB.
converter’s full-scale range.
Integral Nonlinearity (INL)
Total Harmonic Distortion (THD)
INL is the deviation of the ADC transfer function from
THD is the ratio of the power of the fundamental (PS)
a best-fit line determined by a least-squares curve fit
to the power of the first five harmonics (PD).
of that transfer function, measured in units of LSB.
Gain Error
Gain error is the deviation of the ADC actual input
full-scale range from its ideal value. Gain error is
THD is typically given in units of dBc (dB to carrier).
given as a percentage of the ideal input full-scale
Spurious-Free Dynamic Range (SFDR)
range.
The ratio of the power of the fundamental to the
Offset Error
highest other spectral component (either spur or
The offset error is the difference, given in number of
harmonic). SFDR is typically given in units of dBc (dB
LSBs, between the ADC's actual value average idle
to carrier).
channel output code and the ideal average idle
Two-Tone Intermodulation Distortion
channel output code. This quantity is often mapped
IMD3 is the ratio of the power of the fundamental (at
into mV.
frequencies f1, f2) to the power of the worst spectral
component at either frequency 2f1 – f2 or 2f2 – f1).
IMD3 is given either in units of dBc (dB to carrier)
when the absolute power of the fundamental is used
as the reference, or dBFS (dB to full scale) when it is
referred to the full-scale range
Copyright 2008–2009, Texas Instruments Incorporated
11
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