參數(shù)資料
型號: 5962-0050401QXC
廠商: E2V TECHNOLOGIES PLC
元件分類: ADC
英文描述: 1-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, QFP68
封裝: QFP-68
文件頁數(shù): 34/57頁
文件大小: 1276K
代理商: 5962-0050401QXC
4
TS8388B
2144C–BDC–04/03
Electrical
Operating
Characteristics
V
EE = DVEE = -5V; VCC = +5V; VIN -VINB = 500 mVpp Full Scale differential input;
Digital outputs 75 or 50
differentially terminated;
Tj (typical) = 70
°C. Full Temperature Range: up to -55°C < Tc; Tj < +125°C, depending on
device grade.
Differential analog input voltage
(Full Scale)
V
IN, VINB
V
IN - VINB
50
differential or single-ended
±113
450
±125
500
±137
550
mV
mVpp
Clock input power level
PCLK, PCLKB
50
single-ended clock input
3
4
10
dBm
Operating temperature range
TJ
Commercial grade: “C”
Industrial grade: “V”
Military grade: “M”
0 < Tc; Tj < 90
-40 < Tc; Tj < 110
-55 < Tc; Tj < +125
°C
Table 2. Recommended Operating Conditions (Continued)
Parameter
Symbol
Comments
Recommended Value
Unit
Min
Typ
Max
Table 3. Electrical Specifications
Parameter
Symbol
Test
Level
Value
Unit
Note
Min
Typ
Max
Power Requirements (CBGA68 package)
Positive supply voltage
Analog
Digital (ECL)
Digital (LVDS)
VCC
VPLUSD
V
PLUSD
1
4
4.5
1.4
5
0
2.4
5.5
2.6
V
Positive supply current
Analog
Digital
I
CC
IPLUSD
1
420
130
445
145
mA
Negative supply voltage
V
EE
1-5.5
-5
-4.5
V
Negative supply current
Analog
Digital
AI
EE
DIEE
1
185
160
200
180
mA
Nominal power dissipation
PD
1
3.9
4.1
W
Power supply rejection ratio
PSRR
4
0.5
2
mW
Power Requirements
Power Requirements (CQFP68 packaged device)
Positive supply voltage
Analog
Digital (ECL)
Digital (LVDS)
V
CC
V
PLUSD
VPLUSD
1, 2, 6
4
4.7
1.4
5
0
2.4
5.3
2.6
V
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